/linux/Documentation/devicetree/bindings/bus/ |
H A D | simple-pm-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple Power-Managed Bus 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real 16 However, its bus controller is part of a PM domain, or under the control 17 of a functional clock. Hence, the bus controller's PM domain and/or 18 clock must be enabled for child devices connected to the bus (either [all …]
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H A D | fsl,spba-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/fsl,spba-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Shared Peripherals Bus Interface 10 - Shawn Guo <shawnguo@kernel.org> 13 A simple bus enabling access to shared peripherals. 15 The "spba-bus" follows the "simple-bus" set of properties, as 17 "simple-bus" because the SDMA controller uses this compatible flag to 19 the SDMA can access. There are no special clocks for the bus, because [all …]
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H A D | renesas,bsc.yaml | 2 --- 3 $id: http://devicetree.org/schemas/bus/renesas,bsc.yaml# 4 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 title: Renesas Bus State Controller (BSC) 9 - Geert Uytterhoeven <geert+renesas@glider.be> 12 The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus 13 Bridge", or "External Bus Interface") can be found in several Renesas ARM 14 SoCs. It provides an external bus for connecting multiple external 18 While the BSC is a fairly simple memory-mapped bus, it may be part of a 24 The bindings for the BSC extend the bindings for "simple-pm-bus". [all …]
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H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus 10 - Liu Ying <victor.liu@nxp.com> 13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os 14 sitting together with the PHYs. It is not the same as the MSI bus coming 18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks, 20 connected to the bus can be accessed. Also, the bus is part of a power [all …]
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H A D | mvebu-mbus.txt | 6 - compatible: Should be set to one of the following: 7 marvell,armada370-mbus 8 marvell,armadaxp-mbus 9 marvell,armada375-mbus 10 marvell,armada380-mbus 11 marvell,kirkwood-mbus 12 marvell,dove-mbus 13 marvell,orion5x-88f5281-mbus 14 marvell,orion5x-88f5182-mbus 15 marvell,orion5x-88f5181-mbus [all …]
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/linux/drivers/bus/ |
H A D | simple-pm-bus.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Simple Power-Managed Bus Driver 5 * Copyright (C) 2014-2015 Glider bvba 27 const struct device *dev = &pdev->dev; in simple_pm_bus_probe() 29 struct device_node *np = dev->of_node; in simple_pm_bus_probe() 31 struct simple_pm_bus *bus; in simple_pm_bus_probe() local 35 * transparent bus device which has a different compatible string in simple_pm_bus_probe() 37 * of the simple-pm-bus tasks for these devices, so return early. in simple_pm_bus_probe() 39 if (pdev->driver_override) in simple_pm_bus_probe() 42 match = of_match_device(dev->driver->of_match_table, dev); in simple_pm_bus_probe() [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6q-gw54xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 8 #include "imx6qdl-gw54xx.dtsi" 9 #include <dt-bindings/media/tda1997x.h> 13 compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q"; 15 sound-digital { 16 compatible = "simple-audio-card"; 17 simple-audio-card,name = "tda1997x-audio"; 18 simple-audio-card,format = "i2s"; 19 simple-audio-card,bitclock-master = <&sound_codec>; [all …]
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | arm,realview.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 14 Cortex-A8, and Cortex-A9 CPUs. This included new features compared to the 22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created 26 - const: arm,realview-eb 27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S 28 (HBI-0147) was created as a development board to test ARM TrustZone, 31 - const: arm,realview-pb1176 [all …]
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H A D | arm,vexpress-juno.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sudeep Holla <sudeep.holla@arm.com> 11 - Linus Walleij <linus.walleij@linaro.org> 15 multicore Cortex-A class systems. The Versatile Express family contains both 37 further subvariants are released of the core tile, even more fine-granular 45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores 49 - const: arm,vexpress,v2p-ca9 [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1012a-frdm.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "fsl-ls1012a.dtsi" 15 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a"; 17 sys_mclk: clock-mclk { 18 compatible = "fixed-clock"; 19 #clock-cells = <0>; 20 clock-frequency = <25000000>; 23 sc16is7xx_clk: clock-sc16is7xx { [all …]
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H A D | fsl-ls1012a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "fsl-ls1012a.dtsi" 14 compatible = "fsl,ls1012a-qds", "fsl,ls1012a"; 21 sys_mclk: clock-mclk { 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <24576000>; 27 reg_3p3v: regulator-3p3v { 28 compatible = "regulator-fixed"; [all …]
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H A D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls1028a.dtsi" 17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; 32 stdout-path = "serial0:115200n8"; 40 sys_mclk: clock-mclk { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <25000000>; 46 reg_1p8v: regulator-1p8v { [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | mfd.txt | 1 Multi-Function Devices (MFD) 4 more than one non-unique yet varying hardware functionality. 8 - A mixed signal ASIC on an external bus, sometimes a PMIC (Power Management 14 - A range of memory registers containing "miscellaneous system registers" also 20 - compatible : "simple-mfd" - this signifies that the operating system 23 Similarly to how "simple-bus" indicates when to see subnodes as children for 24 a simple memory-mapped bus. 29 - ranges: Describes the address mapping relationship to the parent. Should set 33 - #address-cells: Specifies the number of cells used to represent physical base 36 - #size-cells: Specifies the number of cells used to represent the size of an [all …]
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/linux/Documentation/devicetree/bindings/soc/imx/ |
H A D | fsl,aips-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,aips-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 14 AHB bus and peripherals with the lower bandwidth IP Slave (IPS) 21 const: fsl,aips-bus 23 - compatible 28 - const: fsl,aips-bus 29 - const: simple-bus [all …]
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/linux/Documentation/devicetree/bindings/arm/bcm/ |
H A D | brcm,brcmstb.txt | 2 ----------------------------------------------- 3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants) 7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb" 11 #address-cells = <2>; 12 #size-cells = <2>; 16 Further, syscon nodes that map platform-specific registers used for general 19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon" 20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl", 21 "brcm,brcmstb-cpu-biu-ctrl", 23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon" [all …]
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/linux/Documentation/devicetree/bindings/soc/amlogic/ |
H A D | amlogic,meson-gx-hhi-sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 15 - enum: 16 - amlogic,meson-gx-hhi-sysctrl 17 - amlogic,meson-gx-ao-sysctrl 18 - amlogic,meson-axg-hhi-sysctrl 19 - amlogic,meson-axg-ao-sysctrl [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/power/meson-gxbb-power.h> 16 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; 29 reserved-memory { [all …]
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/linux/arch/arm/boot/dts/amlogic/ |
H A D | meson.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/sound/meson-aiu.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 15 iio-hwmon { 16 compatible = "iio-hwmon"; 17 io-channels = <&saradc 8>; [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | dra7-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include "dra74-ipu-dsp-common.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/clock/ti-dra7-atl.h> 9 #include <dt-bindings/input/input.h> 13 stdout-path = &uart1; 17 compatible = "linux,extcon-usb-gpio"; 18 id-gpios = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 22 compatible = "linux,extcon-usb-gpio"; [all …]
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/linux/arch/arm/boot/dts/unisoc/ |
H A D | rda8810pl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 13 interrupt-parent = <&intc>; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a5"; 29 compatible = "mmio-sram"; 31 #address-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
H A D | fsl,qe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li <Frank.Li@nxp.com> 18 Basically, it is a bus of devices, that could act more or less 27 - const: fsl,qe 28 - const: simple-bus 40 bus-frequency: 44 fsl,qe-num-riscs: 48 fsl,qe-snums: [all …]
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/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h6-tanix.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 /dts-v1/; 6 #include "sun50i-h6.dtsi" 7 #include "sun50i-h6-cpu-opp.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 17 stdout-path = "serial0:115200n8"; 21 compatible = "hdmi-connector"; 22 ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ 27 remote-endpoint = <&hdmi_out_con>; 34 compatible = "i2c-gpio"; [all …]
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/linux/arch/arm64/boot/dts/realtek/ |
H A D | rtd129x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 5 * Copyright (c) 2016-2019 Andreas Färber 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/realtek,rtd1295.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; [all …]
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H A D | rtd139x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/realtek,rtd1295.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 19 reserved-memory { 20 #address-cells = <1>; 21 #size-cells = <1>; 34 no-map; [all …]
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/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | ls1021a-twr.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 7 /dts-v1/; 12 compatible = "fsl,ls1021a-twr", "fsl,ls1021a"; 20 sys_mclk: clock-mclk { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <24576000>; 27 compatible = "regulator-fixed"; 28 regulator-name = "3P3V"; [all …]
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