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/linux/tools/testing/selftests/net/mptcp/
H A Dmptcp_join.sh2 # SPDX-License-Identifier: GPL-2.0
46 declare -A all_tests
47 declare -a only_tests_ids
48 declare -a only_tests_names
49 declare -A failed_tests
114 ip netns exec $netns sysctl -q net.mptcp.pm_type=0 2>/dev/null || true
116 ip netns exec $netns sysctl -q net.mptcp.checksum_enabled=1
132 ip -net "$ns1" addr add 10.0.$i.1/24 dev ns1eth$i
133 ip -net "$ns1" addr add dead:beef:$i::1/64 dev ns1eth$i nodad
134 ip -net "$ns1" link set ns1eth$i up
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H A Dpm_netlink.sh2 # SPDX-License-Identifier: GPL-2.0
9 echo "Usage: $0 [ -i ] [ -h ]"
10 echo -e "\t-i: use 'ip mptcp' instead of 'pm_nl_ctl'"
11 echo -e "\t-h: help"
38 rm -f "${err}"
63 ip -n "${ns1}" mptcp limits
84 ip -n "${ns1}" mptcp endpoint change "${addr}" "${flags}"
129 if [ ${rc} -eq 2 ]; then
132 elif [ ${rc} -eq 0 ]; then
135 elif [ ${rc} -eq 1 ]; then
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/linux/drivers/counter/
H A D104-quad-8.c1 // SPDX-License-Identifier: GPL-2.0
3 * Counter driver for the ACCES 104-QUAD-8
6 * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
32 MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
37 MODULE_PARM_DESC(irq, "ACCES 104-QUAD-8 interrupt line numbers");
50 * struct quad8 - device private data structure
103 /* Reset and Load Signal Decoders */
113 * Reset and Load Signal Decoders
142 /* Non-recycle count */
144 /* Modulo-N */
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H A Drz-mtu3-cnt.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/rz-mtu3.h>
40 * 0: 16-bit, 1: 32-bit
66 * struct rz_mtu3_cnt - MTU3 counter private data
72 * @mtu_16bit_max: Cache for 16-bit counters
73 * @mtu_32bit_max: Cache for 32-bit counters
92 static inline size_t rz_mtu3_get_hw_ch(const size_t id) in rz_mtu3_get_hw_ch() argument
94 return (id == RZ_MTU3_32_BIT_CH) ? 0 : id; in rz_mtu3_get_hw_ch()
97 static inline struct rz_mtu3_channel *rz_mtu3_get_ch(struct counter_device *counter, int id) in rz_mtu3_get_ch() argument
100 const size_t ch_id = rz_mtu3_get_hw_ch(id); in rz_mtu3_get_ch()
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H A Dcounter-sysfs.c1 // SPDX-License-Identifier: GPL-2.0
20 #include "counter-sysfs.h"
28 * struct counter_attribute - Counter sysfs attribute
48 * struct counter_attribute_group - container for attribute group
62 [COUNTER_FUNCTION_PULSE_DIRECTION] = "pulse-direction",
90 [COUNTER_COUNT_MODE_NON_RECYCLE] = "non-recycle",
91 [COUNTER_COUNT_MODE_MODULO_N] = "modulo-n",
93 [COUNTER_COUNT_MODE_HARDWARE_RETRIGGERABLE_ONESHOT] = "hardware retriggerable one-shot",
113 switch (a->scope) { in counter_comp_u8_show()
115 err = a->comp.device_u8_read(counter, &data); in counter_comp_u8_show()
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H A Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/mfd/stm32-timers.h>
65 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
77 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
79 return -EINVAL; in stm32_count_write()
81 return regmap_write(priv->regmap, TIM_CNT, val); in stm32_count_write()
91 regmap_read(priv->regmap, TIM_SMCR, &smcr); in stm32_count_function_read()
107 return -EINVAL; in stm32_count_function_read()
123 if (!priv->has_encoder) in stm32_count_function_write()
124 return -EOPNOTSUPP; in stm32_count_function_write()
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/linux/kernel/time/
H A Dposix-timers.c1 // SPDX-License-Identifier: GPL-2.0+
3 * 2002-10-15 Posix Clocks & timers
7 * 2004-06-01 Fix CLOCK_REALTIME clock/timer TIMER_ABSTIME bug.
20 #include <linux/posix-clock.h>
21 #include <linux/posix-timers.h>
31 #include "posix-timers.h"
35 * constructed from current::signal and the timer ID and the timer is
36 * matched against current::signal and the timer ID when walking the hash
58 static const struct k_clock *clockid_to_kclock(const clockid_t id);
73 __cond_lock(&__timr->it_lock, __timr = __lock_timer(tid)); \
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/linux/drivers/reset/
H A Dreset-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/reset-controller.h>
14 #include <dt-bindings/reset/aspeed,ast2700-scu.h>
29 const struct ast2700_reset_signal *signal; member
35 spinlock_t lock; /* Protect read-modify-write cycle */
159 static int aspeed_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) in aspeed_reset_assert() argument
162 void __iomem *reg_offset = rc->base + rc->info->signal[id].offset; in aspeed_reset_assert()
164 if (rc->info->signal[id].dedicated_clr) { in aspeed_reset_assert()
165 writel(rc->info->signal[id].bit, reg_offset); in aspeed_reset_assert()
167 guard(spinlock_irqsave)(&rc->lock); in aspeed_reset_assert()
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom-ipcc.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 The Inter-Processor Communication Controller (IPCC) is a centralized hardware
14 to route interrupts across various subsystems. It involves a three-level
15 addressing scheme called protocol, client and signal. For example, consider an
18 a case, the client would be Modem (client-id is 2) and the signal would be
[all …]
/linux/include/linux/
H A Dposix-timers.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/posix-timers_types.h>
40 static inline bool clockid_aux_valid(clockid_t id) in clockid_aux_valid() argument
42 return IS_ENABLED(CONFIG_POSIX_AUX_CLOCKS) && id >= CLOCK_AUX && id <= CLOCK_AUX_LAST; in clockid_aux_valid()
50 * cpu_timer - Posix CPU timer representation for k_itimer
56 * @nanosleep: Timer is used for nanosleep and is not a regular posix-timer
72 ctmr->head = head; in cpu_timer_enqueue()
73 return timerqueue_add(head, &ctmr->node); in cpu_timer_enqueue()
78 return !!ctmr->head; in cpu_timer_queued()
84 timerqueue_del(ctmr->head, &ctmr->node); in cpu_timer_dequeue()
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/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_events.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
27 #include <linux/sched/signal.h>
44 bool event_age_enabled; /* set to true when last_event_age is non-zero */
48 * Each signal event needs a 64-bit signal slot where the signaler will write
52 * Individual signal events use their event_id as slot index.
62 return page->kernel_address; in page_slots()
83 page->kernel_address = backing_store; in allocate_signal_page()
84 page->need_to_free_pages = true; in allocate_signal_page()
85 pr_debug("Allocated new event signal page at %p, for process %p\n", in allocate_signal_page()
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H A Dkfd_events.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
36 * IDR supports non-negative integer IDs. Small IDs are used for
37 * signal events to match their signal slot. Use the upper half of the
38 * ID space for non-signal events.
45 * Since the event protocol may need to write the event ID into memory, this
46 * must not be a valid event ID.
47 * For the sake of easy memset-ing, this must be a byte pattern.
49 #define UNSIGNALED_EVENT_SLOT ((uint64_t)-1)
66 /* Only for signal events. */
/linux/tools/testing/selftests/namespaces/
H A Dnsid_test.c1 // SPDX-License-Identifier: GPL-2.0
33 /* Get the mount namespace ID */ in TEST()
38 /* Verify we can get the same ID again */ in TEST()
56 /* Get parent's mount namespace ID */ in TEST()
78 write(pipefd[1], "S", 1); /* Signal skip */ in TEST()
84 /* Signal success */ in TEST()
116 /* Get child's mount namespace ID */ in TEST()
142 /* Get the cgroup namespace ID */ in TEST()
147 /* Verify we can get the same ID again */ in TEST()
165 /* Get parent's cgroup namespace ID */ in TEST()
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/linux/Documentation/firmware-guide/acpi/
H A Dchromeos-acpi-device.rst1 .. SPDX-License-Identifier: GPL-2.0
8 The plug and play ID of a Chrome OS ACPI device is GGL0001 and the hardware ID is
11 .. flat-table:: Supported ACPI Objects
13 :header-rows: 1
15 * - Object
16 - Description
18 * - CHSW
19 - Chrome OS switch positions
21 * - HWID
22 - Chrome OS hardware ID
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/linux/Documentation/devicetree/bindings/mmc/
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
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/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
39 #define AUX_REG_LIST(id)\ argument
40 SRI(AUX_CONTROL, DP_AUX, id), \
41 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
44 #define HPD_REG_LIST(id)\ argument
45 SRI(DC_HPD_CONTROL, HPD, id)
47 #define LE_COMMON_REG_LIST_BASE(id) \ argument
52 SRI(DIG_BE_CNTL, DIG, id), \
53 SRI(DIG_BE_EN_CNTL, DIG, id), \
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/linux/drivers/tty/
H A Dtty_jobctrl.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/signal.h>
9 #include <linux/sched/signal.h>
18 return (sigismember(&current->blocked, sig) || in is_ignored()
19 current->sighand->action[sig-1].sa.sa_handler == SIG_IGN); in is_ignored()
23 * __tty_check_change - check for POSIX terminal changes
25 * @sig: signal to send
28 * not in the foreground, send a SIGTTOU. If the signal is blocked or
39 if (current->signal->tty != tty) in __tty_check_change()
45 spin_lock_irqsave(&tty->ctrl.lock, flags); in __tty_check_change()
[all …]
/linux/sound/core/
H A Dmisc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 * snd_pci_quirk_lookup_id - look up a PCI SSID quirk list
29 * @vendor: PCI SSV id
30 * @device: PCI SSD id
45 for (q = list; q->subvendor || q->subdevic in snd_pci_quirk_lookup_id()
91 int signal; global() member
147 snd_kill_fasync(struct snd_fasync * fasync,int signal,int poll) snd_kill_fasync() argument
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/linux/drivers/parisc/
H A Diosapic_private.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Copyright (C) 2000,2003 Grant Grundler (grundler at parisc-linux.org)
7 * Copyright (C) 2002 Matthew Wilcox (willy at parisc-linux.org)
15 ** they pack nicely for 64-bit compilation. (ie sizeof(long) == 8)
21 ** -----------------------
24 ** table per cell. N- and L-class consist of a single cell.
49 ** 01 = Edge-triggered
51 ** 11 = Level-triggered
57 ** irq identifies PCI interrupt signal where
66 /* Source Bus ID identifies the bus where interrupt signal comes from */
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/linux/kernel/sched/
H A Dautogroup.c1 // SPDX-License-Identifier: GPL-2.0
4 * Auto-group scheduling implementation:
40 init_task->signal->autogroup = &autogroup_default; in autogroup_init()
46 kfree(tg->autogroup); in autogroup_free()
55 ag->tg->rt_se = NULL; in autogroup_destroy()
56 ag->tg->rt_rq = NULL; in autogroup_destroy()
58 sched_release_group(ag->tg); in autogroup_destroy()
59 sched_destroy_group(ag->tg); in autogroup_destroy()
64 kref_put(&ag->kref, autogroup_destroy); in autogroup_kref_put()
69 kref_get(&ag->kref); in autogroup_kref_get()
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/linux/drivers/gpu/drm/amd/display/include/
H A Dbios_parser_types.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
38 AS_SIGNAL_TYPE_NONE = 0L, /* no signal */
115 enum signal_type signal; member
127 enum signal_type signal; member
139 enum signal_type signal; member
152 enum signal_type signal; member
197 /* Input: Signal Type - to be converted to Encoder mode */
199 /* Input: Encoder object id */
207 /* Output: If non-zero, this refDiv value should be used to calculate
210 /* Output: If non-zero, this postDiv value should be used to calculate
[all …]
/linux/tools/bpf/bpftool/
H A Dmap_perf_ring.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
11 #include <signal.h>
41 __u64 id; member
67 int idx = ctx->all_cpus ? cpu : ctx->idx; in print_bpf_output()
72 jsonw_uint(json_wtr, e->header.type); in print_bpf_output()
77 if (e->header.type == PERF_RECORD_SAMPLE) { in print_bpf_output()
79 jsonw_uint(json_wtr, e->time); in print_bpf_output()
81 print_data_json(e->data, e->size); in print_bpf_output()
82 } else if (e->header.type == PERF_RECORD_LOST) { in print_bpf_output()
85 jsonw_name(json_wtr, "id"); in print_bpf_output()
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/linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/
H A Ddcn10_link_encoder.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
34 #define AUX_REG_LIST(id)\ argument
35 SRI(AUX_CONTROL, DP_AUX, id), \
36 SRI(AUX_DPHY_RX_CONTROL0, DP_AUX, id), \
37 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
39 #define HPD_REG_LIST(id)\ argument
40 SRI(DC_HPD_CONTROL, HPD, id)
42 #define LE_DCN_COMMON_REG_LIST(id) \ argument
43 SRI(DIG_BE_CNTL, DIG, id), \
44 SRI(DIG_BE_EN_CNTL, DIG, id), \
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/linux/security/safesetid/
H A Dlsm.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 SIDPOL_DEFAULT, /* source ID is unaffected by policy */
26 SIDPOL_CONSTRAINED, /* source ID is affected by policy */
27 SIDPOL_ALLOWED /* target ID explicitly allowed */
42 * can set*id to 'dst_id'.
49 /* Flag to signal if rule is for UID's or GID's */
63 //Flag to signal if ruleset is for UID's or GID's
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-rf-tuner.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _rf-tuner-controls:
14 converts that received signal to lower intermediate frequency (IF) or
16 called Zero-IF tuners. Older tuners were typically simple PLL tuners
28 .. _rf-tuner-control-id:
43 Filter(s) on tuner signal path are used to filter signal according
47 range and step are driver-specific.
59 The RF amplifier is the very first amplifier on the receiver signal
64 range and step are driver-specific.
68 signal path. It is located very close to tuner antenna input. Used
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