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/linux/Documentation/netlink/specs/
H A Dnet_shaper.yaml3 name: net-shaper
13 Each @shaper is identified within the given device, by a @handle,
22 operation, to create and update a single "attached" shaper, and
39 doc: Defines the shaper @id interpretation.
46 doc: The main shaper for the given network device.
50 The shaper is attached to the given device queue,
55 The shaper allows grouping of queues or other
63 doc: Different metric supported by the shaper.
67 doc: Shaper operates on a bits per second basis.
70 doc: Shaper operates on a packets per second basis.
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/linux/net/shaper/
H A Dshaper.c139 const struct net_shaper *shaper, in net_shaper_fill_one() argument
149 net_shaper_fill_handle(msg, &shaper->parent, in net_shaper_fill_one()
151 net_shaper_fill_handle(msg, &shaper->handle, in net_shaper_fill_one()
153 ((shaper->bw_min || shaper->bw_max || shaper->burst) && in net_shaper_fill_one()
154 nla_put_u32(msg, NET_SHAPER_A_METRIC, shaper->metric)) || in net_shaper_fill_one()
155 (shaper->bw_min && in net_shaper_fill_one()
156 nla_put_uint(msg, NET_SHAPER_A_BW_MIN, shaper->bw_min)) || in net_shaper_fill_one()
157 (shaper->bw_max && in net_shaper_fill_one()
158 nla_put_uint(msg, NET_SHAPER_A_BW_MAX, shaper->bw_max)) || in net_shaper_fill_one()
159 (shaper->burst && in net_shaper_fill_one()
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_top.h15 * struct traffic_shaper_cfg: traffic shaper configuration
16 * @en : enable/disable traffic shaper
93 * @setup_traffic_shaper : programs traffic shaper control.
95 * @cfg : traffic shaper configuration
H A Ddpu_hw_catalog.h43 * @DPU_SSPP_TS_PREFILL Supports prefill with traffic shaper
44 * @DPU_SSPP_TS_PREFILL_REC1 Supports prefill with traffic shaper multirec
105 * @DPU_WB_TRAFFIC_SHAPER, Writeback traffic shaper bloc
/linux/net/sched/
H A Dsch_mqprio.c26 u16 shaper; member
48 if (priv->shaper != TC_MQPRIO_SHAPER_DCB) in mqprio_enable_offload()
56 mqprio.shaper = priv->shaper; in mqprio_enable_offload()
274 priv->shaper = nla_get_u16(tb[TCA_MQPRIO_SHAPER]); in mqprio_parse_nlattr()
278 if (priv->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in mqprio_parse_nlattr()
280 "min_rate accepted only when shaper is in bw_rlimit mode"); in mqprio_parse_nlattr()
307 if (priv->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in mqprio_parse_nlattr()
309 "max_rate accepted only when shaper is in bw_rlimit mode"); in mqprio_parse_nlattr()
594 nla_put_u16(skb, TCA_MQPRIO_SHAPER, priv->shaper)) in mqprio_dump()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_color.c195 * degamma TF, shaper TF (before 3D LUT), and blend(dpp.ogam) TF and
1047 * If user shaper LUT is set, we assume a linear color space in amdgpu_dm_atomic_shaper_lut()
1094 * shaper and 3D LUTs match the hw supported size
1099 * newer) and if the user shaper and 3D LUTs match the supported size.
1108 const struct drm_color_lut *shaper = NULL, *lut3d = NULL; in amdgpu_dm_verify_lut3d_size() local
1112 /* shaper LUT is only available if 3D LUT color caps */ in amdgpu_dm_verify_lut3d_size()
1114 shaper = __extract_blob_lut(dm_plane_state->shaper_lut, &size); in amdgpu_dm_verify_lut3d_size()
1116 if (shaper && size != exp_size) { in amdgpu_dm_verify_lut3d_size()
1118 "Invalid Shaper LUT size. Should be %u but got %u.\n", in amdgpu_dm_verify_lut3d_size()
1608 /* 1D Curve - SHAPER TF */ in __set_dm_plane_colorop_shaper()
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H A Damdgpu_dm_colorop.c117 /* 1D curve - SHAPER TF */ in amdgpu_dm_initialize_default_pipeline()
134 /* 1D LUT - SHAPER LUT */ in amdgpu_dm_initialize_default_pipeline()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_tm.h201 u8 ir_b; /* IR_B parameter of IR shaper */
202 u8 ir_u; /* IR_U parameter of IR shaper */
203 u8 ir_s; /* IR_S parameter of IR shaper */
H A Dhclge_tm.c26 /* hclge_shaper_para_calc: calculate ir parameter for the shaper
28 * @shaper_level: the shaper level. eg: port, pg, priority, queueset
29 * @ir_para: parameters of IR shaper
899 /* Calc shaper para */ in hclge_tm_pg_shaper_cfg()
1150 /* Need config vport shaper */ in hclge_tm_pri_vnet_base_shaper_cfg()
1477 /* Cfg tm shaper */ in hclge_tm_schd_setup_hw()
1848 "failed to get qset %u shaper, ret = %d\n", qset_id, in hclge_tm_get_qset_shaper()
1923 "failed to get priority shaper(%#x), ret = %d\n", in hclge_tm_get_pri_shaper()
2077 "failed to get pg shaper(%#x), ret = %d\n", in hclge_tm_get_pg_shaper()
2105 "failed to get port shaper, ret = %d\n", ret); in hclge_tm_get_port_shaper()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mode.h372 * shaper LUT that converts color content before 3D LUT.
380 * pre-blending shaper LUT as supported by the driver (read-only).
385 * transfer function for pre-blending shaper (before applying 3D LUT)
386 * with or without LUT. There is no shaper ROM, but we can use AMD
412 * conversion. It works as a post-3DLUT 1D LUT. With shaper LUT, they
/linux/tools/testing/selftests/drivers/net/
H A DMakefile23 shaper.py \
/linux/drivers/net/ethernet/mscc/
H A Docelot_police.h14 MSCC_QOS_RATE_MODE_DISABLED, /* Policer/shaper disabled */
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Diavf.rst156 The shaper bw_rlimit parameter is optional.
164 queues 16@0 16@16 hw 1 mode channel shaper bw_rlimit min_rate 1Gbit 2Gbit
178 shaper bw_rlimit: for each tc, sets minimum and maximum bandwidth rates.
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dhirschmann,hellcreek.yaml21 Shaper.
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h197 struct dc_transfer_func **shaper);
203 struct dc_transfer_func **shaper);
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_cm_common.c171 // Shaper LUT (i.e. fixpoint == true) is still 256 bases and 256 deltas in cm3_helper_translate_curve_to_hw_format()
282 DC_LOG_ERROR("Losing delta precision while programming shaper LUT."); in cm3_helper_translate_curve_to_hw_format()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1432 struct dc_transfer_func **shaper) in dcn30_acquire_post_bldn_3dlut() argument
1438 ASSERT(*lut == NULL && *shaper == NULL); in dcn30_acquire_post_bldn_3dlut()
1440 *shaper = NULL; in dcn30_acquire_post_bldn_3dlut()
1445 *shaper = pool->mpc_shaper[i]; in dcn30_acquire_post_bldn_3dlut()
1467 struct dc_transfer_func **shaper) in dcn30_release_post_bldn_3dlut() argument
1473 if (pool->mpc_lut[i] == *lut && pool->mpc_shaper[i] == *shaper) { in dcn30_release_post_bldn_3dlut()
1477 *shaper = NULL; in dcn30_release_post_bldn_3dlut()
/linux/drivers/net/ethernet/ti/
H A DKconfig143 Time Aware Shaper (TAS) / Enhanced Scheduled Traffic (EST),
/linux/include/uapi/linux/
H A Ddcbnl.h38 * @cbs: credit based shaper ets algorithm supported
53 * 1 credit-based shaper
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c1600 struct dc_transfer_func **shaper) in dcn32_acquire_post_bldn_3dlut() argument
1604 ASSERT(*lut == NULL && *shaper == NULL); in dcn32_acquire_post_bldn_3dlut()
1606 *shaper = NULL; in dcn32_acquire_post_bldn_3dlut()
1610 *shaper = pool->mpc_shaper[mpcc_id]; in dcn32_acquire_post_bldn_3dlut()
1621 struct dc_transfer_func **shaper) in dcn32_release_post_bldn_3dlut() argument
1627 if (pool->mpc_lut[i] == *lut && pool->mpc_shaper[i] == *shaper) { in dcn32_release_post_bldn_3dlut()
1631 *shaper = NULL; in dcn32_release_post_bldn_3dlut()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c83 DTN_INFO("DPP: DGAM ROM DGAM ROM type DGAM LUT SHAPER mode" in dcn30_log_color_state()
176 " SHAPER mode 3DLUT mode 3DLUT bit-depth 3DLUT size OGAM mode OGAM LUT" in dcn30_log_color_state()
268 //get the shaper lut params in dcn30_set_mpc_shaper_3dlut()
405 /*program rmu shaper and 3dlut in MPC*/ in dcn30_set_output_transfer_func()
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_tc_mqprio.c28 } else if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { in cxgb4_mqprio_validate()
29 netdev_err(dev, "Only bandwidth rate shaper supported\n"); in cxgb4_mqprio_validate()
/linux/drivers/atm/
H A Dmidway.h17 #define TS_CLOCK 25000000 /* traffic shaper clock (cell/sec) */
/linux/include/net/
H A Dpkt_sched.h169 u16 shaper;
174 u16 shaper; global() member
/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_main.c3070 * After a reset, the shaper parameters of queues need to be replayed again.
5061 const struct net_shaper *shaper, in iavf_verify_shaper() argument
5067 if (shaper->handle.scope == NET_SHAPER_SCOPE_QUEUE) { in iavf_verify_shaper()
5068 vf_max = adapter->qos_caps->cap[0].shaper.peak; in iavf_verify_shaper()
5069 if (vf_max && shaper->bw_max > vf_max) { in iavf_verify_shaper()
5071 shaper->bw_max, shaper->handle.id, in iavf_verify_shaper()
5081 const struct net_shaper *shaper, in iavf_shaper_set() argument
5085 const struct net_shaper_handle *handle = &shaper->handle; in iavf_shaper_set()
5094 ret = iavf_verify_shaper(binding, shaper, extack); in iavf_shaper_set()
5100 tx_ring->q_shaper.bw_min = div_u64(shaper->bw_min, 1000); in iavf_shaper_set()
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