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/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_shader.c45 struct vmw_shader shader; member
127 * Shader management:
167 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_init() local
186 shader->size = size; in vmw_gb_shader_init()
187 shader->type = type; in vmw_gb_shader_init()
188 shader->num_input_sig = num_input_sig; in vmw_gb_shader_init()
189 shader->num_output_sig = num_output_sig; in vmw_gb_shader_init()
196 * GB shader code:
202 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_create() local
214 DRM_ERROR("Failed to allocate a shader id.\n"); in vmw_gb_shader_create()
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H A Dvmwgfx_binding.h95 * struct vmw_ctx_bindinfo_shader - Shader binding metadata
179 * struct vmw_dx_shader_bindings - per shader type context binding state
181 * @shader: The shader binding for this shader type
182 * @const_buffer: Const buffer bindings for this shader type.
183 * @shader_res: Shader resource view bindings for this shader type.
184 * @dirty_sr: Bitmap tracking individual shader resource bindings changes
190 struct vmw_ctx_bindinfo_shader shader; member
H A Dvmwgfx_so.c299 * @man: Pointer to the compat shader manager identifying the shader namespace.
304 * @user_key: The key that is used to identify the shader. The key is
385 * @man: Pointer to the view manager identifying the shader namespace.
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.h192 #define SHADER(_type, _size) \ macro
200 SHADER(A6XX_TP0_TMO_DATA, 0x200),
201 SHADER(A6XX_TP0_SMO_DATA, 0x80),
202 SHADER(A6XX_TP0_MIPMAP_BASE_DATA, 0x3c0),
203 SHADER(A6XX_TP1_TMO_DATA, 0x200),
204 SHADER(A6XX_TP1_SMO_DATA, 0x80),
205 SHADER(A6XX_TP1_MIPMAP_BASE_DATA, 0x3c0),
206 SHADER(A6XX_SP_INST_DATA, 0x800),
207 SHADER(A6XX_SP_LB_0_DATA, 0x800),
208 SHADER(A6XX_SP_LB_1_DATA, 0x800),
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3_cleaner_shader.asm24 // This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords …
25 //To turn this shader program on for complitaion change this to main and lower shader main to main_1
36 // The shader starts with "S_BARRIER" to ensure SPI has launched all waves of the workgroup
44 // Instead, the shader starts with an S_SETHALT 1. Once all waves are launched CP will sen…
45 // The shader then clears all SGPRs allocated to it, cleaning out physical SGPRs 224-799
47 shader main label
H A Dgfx_v10_3_0_cleaner_shader.asm24 // This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords …
25 //To turn this shader program on for complitaion change this to main and lower shader main to main_1
35 // The shader starts with "S_BARRIER" to ensure SPI has launched all waves of the workgroup
39 shader main label
H A Dgfx_v9_0_cleaner_shader.h23 /* Define the cleaner shader gfx_9_0 */
25 /* Add the cleaner shader code here */
28 /* Define the cleaner shader gfx_9_4_2 */
H A Dgfx_v10_1_10_cleaner_shader.asm24 // This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 256 Dwords …
34 // The shader starts with "S_BARRIER" to ensure SPI has launched all waves of the workgroup
38 shader main label
H A Dgfx_v10_0_cleaner_shader.h24 /* Define the cleaner shader gfx_10_1_10 */
59 /* Define the cleaner shader gfx_10_3_0 */
H A Dgfx_v9_4_3_cleaner_shader.h24 /* Define the cleaner shader gfx_9_4_3 */
/linux/include/uapi/drm/
H A Dvc4_drm.h95 * coordinate shader to determine where primitives land on the screen,
101 /* Pointer to the shader records.
103 * Shader records are the structures read by the hardware that contain
105 * reference to the shader record has enough information to determine
108 * just stored as __u32s before each shader record passed in.
113 * referenced by the shader.
115 * For each shader state record, there is a set of uniform data in the
123 * because the kernel has to determine the sizes anyway during shader
131 /* Size in bytes of the set of shader records. */
133 /* Number of shader records.
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H A Dvmwgfx_drm.h837 * DRM_VMW_CREATE_SHADER - Create shader
839 * Creates a shader and optionally binds it to a dma buffer containing
840 * the shader byte-code.
844 * enum drm_vmw_shader_type - Shader types
855 * @shader_type: Shader type of the shader to create.
857 * where the shader byte-code starts
859 * shader byte-code
861 * can be used to subsequently identify the shader.
876 * DRM_VMW_UNREF_SHADER - Unreferences a shader
878 * Destroys a user-space reference to a shader, optionally destroying
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c203 const int shader = cstate->domain[nv_clk_src_shader]; in mcp77_clk_calc() local
215 /* Calculate clock * 2, so shader clock can use it too */ in mcp77_clk_calc()
239 if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) { in mcp77_clk_calc()
242 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
244 out = calc_P((core << 1), shader, &divs); in mcp77_clk_calc()
246 if (abs(shader - out) <= in mcp77_clk_calc()
247 abs(shader - clock) && in mcp77_clk_calc()
281 nvkm_debug(subdev, "shader: hrefm4\n"); in mcp77_clk_calc()
283 nvkm_debug(subdev, "shader: nvpll\n"); in mcp77_clk_calc()
285 nvkm_debug(subdev, "shader: spll\n"); in mcp77_clk_calc()
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H A Dnv50.c375 const int shader = cstate->domain[nv_clk_src_shader]; in nv50_clk_calc() local
451 /* core/shader: disconnect nvclk/sclk from their PLLs (nvclk to dom6, in nv50_clk_calc()
468 /* shader: tie to nvclk if possible, otherwise use spll. have to be in nv50_clk_calc()
469 * very careful that the shader clock is at least twice the core, or in nv50_clk_calc()
474 if (P1-- && shader == (core << 1)) { in nv50_clk_calc()
478 freq = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in nv50_clk_calc()
552 { nv_clk_src_shader , 0xff, 0, "shader", 1000 },
H A Dnv40.c168 /* use the second pll for shader/rop clock, if it differs from core */ in nv40_clk_calc()
214 { nv_clk_src_shader , 0xff, 0, "shader", 1000 },
H A Dg84.c36 { nv_clk_src_shader , 0xff, 0, "shader", 1000 },
/linux/Documentation/devicetree/bindings/gpu/
H A Dvivante,gc.yaml35 - description: Shader clock (only required if GPU has feature PIPE_3D)
42 enum: [ bus, core, shader, reg ]
72 clock-names = "bus", "core", "shader";
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dperf.c116 info->shader = nvbios_rd16(bios, perf + 0x06) * 1000; in nvbios_perfEp()
117 info->core = info->shader + (signed char) in nvbios_perfEp()
133 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp()
143 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp()
/linux/Documentation/gpu/
H A Dvc4.rst99 Shader validator for VC4
102 :doc: Shader validator for VC4.
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_pwr.c127 return "Shader"; in get_domain_name()
525 /* Delegate control of the shader and tiler power domains to the MCU as in panthor_pwr_l2_power_on()
526 * it can better manage which shader/tiler cores need to be powered up in panthor_pwr_l2_power_on()
529 * If the shader and tiler domains are already delegated to the MCU, in panthor_pwr_l2_power_on()
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-el2.dtso10 /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
H A Dsc8280xp-el2.dtso10 /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-gpu0.dtsi21 clock-names = "core", "shader";
/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_issues.h43 /* Repeatedly Soft-stopping a job chain consisting of (Vertex Shader,
87 /* Soft-stopped fragment shader job can restart with out-of-bound
/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dperf.h12 u32 shader; member

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