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/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_shader.c45 struct vmw_shader shader; member
127 * Shader management:
167 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_init() local
186 shader->size = size; in vmw_gb_shader_init()
187 shader->type = type; in vmw_gb_shader_init()
188 shader->num_input_sig = num_input_sig; in vmw_gb_shader_init()
189 shader->num_output_sig = num_output_sig; in vmw_gb_shader_init()
196 * GB shader code:
202 struct vmw_shader *shader = vmw_res_to_shader(res); in vmw_gb_shader_create() local
214 DRM_ERROR("Failed to allocate a shader id.\n"); in vmw_gb_shader_create()
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H A Dvmwgfx_binding.h95 * struct vmw_ctx_bindinfo_shader - Shader binding metadata
179 * struct vmw_dx_shader_bindings - per shader type context binding state
181 * @shader: The shader binding for this shader type
182 * @const_buffer: Const buffer bindings for this shader type.
183 * @shader_res: Shader resource view bindings for this shader type.
184 * @dirty_sr: Bitmap tracking individual shader resource bindings changes
190 struct vmw_ctx_bindinfo_shader shader; member
H A Dvmwgfx_so.c299 * @man: Pointer to the compat shader manager identifying the shader namespace.
304 * @user_key: The key that is used to identify the shader. The key is
385 * @man: Pointer to the view manager identifying the shader namespace.
/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.h192 #define SHADER(_type, _size) \ macro
200 SHADER(A6XX_TP0_TMO_DATA, 0x200),
201 SHADER(A6XX_TP0_SMO_DATA, 0x80),
202 SHADER(A6XX_TP0_MIPMAP_BASE_DATA, 0x3c0),
203 SHADER(A6XX_TP1_TMO_DATA, 0x200),
204 SHADER(A6XX_TP1_SMO_DATA, 0x80),
205 SHADER(A6XX_TP1_MIPMAP_BASE_DATA, 0x3c0),
206 SHADER(A6XX_SP_INST_DATA, 0x800),
207 SHADER(A6XX_SP_LB_0_DATA, 0x800),
208 SHADER(A6XX_SP_LB_1_DATA, 0x800),
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/linux/drivers/gpu/drm/vc4/
H A Dvc4_validate_shaders.c25 * DOC: Shader validator for VC4.
34 * The shader validator walks over a shader's BO, ensuring that its
39 * Shader BO are immutable for their lifetimes (enforced by not
53 /* IP at the end of the BO, do not read shader[max_ip] */
56 uint64_t *shader; member
87 * stream, even if the shader didn't need to read uniforms in later
94 * a threaded shader, then the other shader running on our
187 uint64_t inst = validation_state->shader[validation_state->ip]; in check_tmu_write()
311 uint64_t inst = validation_state->shader[validation_state->ip]; in validate_uniform_address_write()
390 uint64_t inst = validation_state->shader[validation_state->ip]; in check_reg_write()
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H A Dvc4_drv.h265 /* Struct for shader validation state, if created by
690 /* This is the BO where we store the validated command lists, shader
696 * This tracks the per-shader-record state (packet 64) that
697 * determines the length of the shader record and the offset
704 * shader state.
709 /** How many shader states the user declared they were using. */
711 /** How many shader state records the validator has seen. */
736 /* Pointers to the shader recs. These paddr gets incremented as CL
738 * (u and v) get incremented and size decremented as the shader recs
825 * For a given shader, each time a shader state record references it, we need
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H A Dvc4_validate.c124 DRM_DEBUG("Trying to use shader BO as something other than " in vc4_use_bo()
125 "a shader\n"); in vc4_use_bo()
275 DRM_DEBUG("shader state must precede primitives\n"); in validate_indexed_prim_list()
312 DRM_DEBUG("shader state must precede primitives\n"); in validate_gl_array_primitive()
335 DRM_DEBUG("More requests for shader states than declared\n"); in validate_gl_shader_state()
343 DRM_DEBUG("high bits set in GL shader rec reference\n"); in validate_gl_shader_state()
779 DRM_DEBUG("overflowed shader recs reading %d handles " in validate_gl_shader_rec()
789 DRM_DEBUG("overflowed shader recs copying %db packet " in validate_gl_shader_rec()
798 /* Shader recs have to be aligned to 16 bytes (due to the attribute in validate_gl_shader_rec()
799 * flags being in the low bytes), so round the next validated shader in validate_gl_shader_rec()
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/linux/include/uapi/drm/
H A Dvc4_drm.h95 * coordinate shader to determine where primitives land on the screen,
101 /* Pointer to the shader records.
103 * Shader records are the structures read by the hardware that contain
105 * reference to the shader record has enough information to determine
108 * just stored as __u32s before each shader record passed in.
113 * referenced by the shader.
115 * For each shader state record, there is a set of uniform data in the
123 * because the kernel has to determine the sizes anyway during shader
131 /* Size in bytes of the set of shader records. */
133 /* Number of shader records.
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H A Dvmwgfx_drm.h837 * DRM_VMW_CREATE_SHADER - Create shader
839 * Creates a shader and optionally binds it to a dma buffer containing
840 * the shader byte-code.
844 * enum drm_vmw_shader_type - Shader types
855 * @shader_type: Shader type of the shader to create.
857 * where the shader byte-code starts
859 * shader byte-code
861 * can be used to subsequently identify the shader.
876 * DRM_VMW_UNREF_SHADER - Unreferences a shader
878 * Destroys a user-space reference to a shader, optionally destroying
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H A Damdgpu_drm.h90 * across shader threads.
663 /* The IB fence should do the L2 writeback but not invalidate any shader
859 /* Subquery id: Query GPU shader clock */
873 /* Subquery id: Query GPU stable pstate shader clock */
877 /* Subquery id: Query GPU peak pstate shader clock */
1140 /* shader visible vgprs*/
1142 /* CU per shader array*/
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3_cleaner_shader.asm24 // This shader is to clean LDS, SGPRs and VGPRs. It is first 64 Dwords or 256 bytes of 192 Dwords …
25 //To turn this shader program on for complitaion change this to main and lower shader main to main_1
36 // The shader starts with "S_BARRIER" to ensure SPI has launched all waves of the workgroup
44 // Instead, the shader starts with an S_SETHALT 1. Once all waves are launched CP will sen…
45 // The shader then clears all SGPRs allocated to it, cleaning out physical SGPRs 224-799
47 shader main label
H A Dgfx_v9_0_cleaner_shader.h23 /* Define the cleaner shader gfx_9_0 */
25 /* Add the cleaner shader code here */
/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h13 #define GPU_CORE_FEATURES 0x008 /* (RO) Shader Core Features */
93 #define GPU_SHADER_PRESENT_LO 0x100 /* (RO) Shader core present bitmap, low word */
94 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
108 #define SHADER_READY_LO 0x140 /* (RO) Shader core ready bitmap, low word */
109 #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */
121 #define SHADER_PWRON_LO 0x180 /* (WO) Shader core power on bitmap, low word */
122 #define SHADER_PWRON_HI 0x184 /* (WO) Shader core power on bitmap, high word */
134 #define SHADER_PWROFF_LO 0x1C0 /* (WO) Shader core power off bitmap, low word */
135 #define SHADER_PWROFF_HI 0x1C4 /* (WO) Shader core power off bitmap, high word */
147 #define SHADER_PWRTRANS_LO 0x200 /* (RO) Shader core power transition bitmap, low word */
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H A Dpanfrost_issues.h43 /* Repeatedly Soft-stopping a job chain consisting of (Vertex Shader,
87 /* Soft-stopped fragment shader job can restart with out-of-bound
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c203 const int shader = cstate->domain[nv_clk_src_shader]; in mcp77_clk_calc() local
215 /* Calculate clock * 2, so shader clock can use it too */ in mcp77_clk_calc()
239 if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) { in mcp77_clk_calc()
242 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
244 out = calc_P((core << 1), shader, &divs); in mcp77_clk_calc()
246 if (abs(shader - out) <= in mcp77_clk_calc()
247 abs(shader - clock) && in mcp77_clk_calc()
281 nvkm_debug(subdev, "shader: hrefm4\n"); in mcp77_clk_calc()
283 nvkm_debug(subdev, "shader: nvpll\n"); in mcp77_clk_calc()
285 nvkm_debug(subdev, "shader: spll\n"); in mcp77_clk_calc()
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H A Dnv50.c375 const int shader = cstate->domain[nv_clk_src_shader]; in nv50_clk_calc() local
451 /* core/shader: disconnect nvclk/sclk from their PLLs (nvclk to dom6, in nv50_clk_calc()
468 /* shader: tie to nvclk if possible, otherwise use spll. have to be in nv50_clk_calc()
469 * very careful that the shader clock is at least twice the core, or in nv50_clk_calc()
474 if (P1-- && shader == (core << 1)) { in nv50_clk_calc()
478 freq = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in nv50_clk_calc()
552 { nv_clk_src_shader , 0xff, 0, "shader", 1000 },
H A Dnv40.c168 /* use the second pll for shader/rop clock, if it differs from core */ in nv40_clk_calc()
214 { nv_clk_src_shader , 0xff, 0, "shader", 1000 },
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_flat_memory.c47 * “Flat” shader memory access – These are new shader vector memory
66 * clients (CP/RLC, DMA, SHADER(ifetch, scalar, and vector ops)) to access
123 * that references this memory descriptor. This is the case for shader
125 * locations of assets (ex. the shader program location). In these cases
127 * address in the descriptor (ex. V# or T# or shader program location)
130 * space. For example a shader program cannot jump in/out between ATC
136 * S_LOAD and FLAT_* shader memory instructions where we have 64b pointers
180 * the shader for reporting a “memory violation” back to the
259 * For the S_LOAD and FLAT_* shader operations, the SUA mode is decoded from
/linux/Documentation/devicetree/bindings/gpu/
H A Dvivante,gc.yaml35 - description: Shader clock (only required if GPU has feature PIPE_3D)
42 enum: [ bus, core, shader, reg ]
72 clock-names = "bus", "core", "shader";
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dperf.c116 info->shader = nvbios_rd16(bios, perf + 0x06) * 1000; in nvbios_perfEp()
117 info->core = info->shader + (signed char) in nvbios_perfEp()
133 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp()
143 info->shader = nvbios_rd16(bios, perf + 0x0a) * 1000; in nvbios_perfEp()
/linux/Documentation/gpu/amdgpu/
H A Damdgpu-glossary.rst108 Shader Engine
111 SHader array
H A Ddebugging.rst69 In the example above, a shader (cliend id = TCP) generated a read (RW = 0x0) to
71 0x0000800102800000. The user can then inspect their shader code and resource
/linux/Documentation/devicetree/bindings/display/msm/
H A Dgpu.yaml105 zap-shader:
110 points to reserved memory to store the zap shader that can be used to
358 zap-shader {
/linux/Documentation/gpu/
H A Dvc4.rst99 Shader validator for VC4
102 :doc: Shader validator for VC4.
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-gpu0.dtsi21 clock-names = "core", "shader";

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