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Searched +full:sg2042 +full:- +full:clkgen (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/src/riscv/sophgo/
H A Dsg2042.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/clock/sophgo,sg2042-clkgen.h>
8 #include <dt-bindings/clock/sophgo,sg2042-pll.h>
9 #include <dt-bindings/clock/sophgo,sg2042-rpgate.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset/sophgo,sg2042-reset.h>
13 #include "sg2042-cpus.dtsi"
16 compatible = "sophgo,sg2042";
17 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dsophgo,sg2042-clkgen.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-clkgen.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sophgo SG2042 Clock Generator for divider/mux/gate
10 - Chen Wang <unicorn_wang@outlook.com>
14 const: sophgo,sg2042-clkgen
21 - description: Main PLL
22 - description: Fixed PLL
23 - description: DDR PLL 0
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H A Dsophgo,sg2042-rpgate.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem
10 - Chen Wang <unicorn_wang@outlook.com>
14 const: sophgo,sg2042-rpgate
21 - description: Gate clock for RP subsystem
23 clock-names:
25 - const: rpgate
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