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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
12 serial0 = &blsp1_uart1;
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-state {
28 pins = "gpio16", "gpio17";
30 bias-disable;
[all …]
H A Dqcom-ipq4019-ap.dk07.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1";
17 serial0 = &blsp1_uart1;
22 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-state {
28 pins = "gpio16", "gpio17";
30 bias-disable;
[all …]
H A Dqcom-ipq4018-ap120c-ac.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
8 model = "ALFA Network AP120C-AC";
9 compatible = "alfa-network,ap120c-ac", "qcom,ipq4018";
12 serial0 = &blsp1_uart1;
16 stdout-path = "serial0:115200n8";
20 compatible = "gpio-keys";
22 key-reset {
[all …]
H A Dqcom-ipq4019-ap.dk01.1.dtsi17 #include <dt-bindings/gpio/gpio.h>
18 #include "qcom-ipq4019.dtsi"
21 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
24 serial0 = &blsp1_uart1;
28 stdout-path = "serial0:115200n8";
37 serial_pins: serial-state {
38 pins = "gpio60", "gpio61";
40 bias-disable;
43 spi_0_pins: spi-0-state {
44 spi0-pins {
[all …]
/linux/arch/mips/boot/dts/mscc/
H A Dserval_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 serial0 = &uart0;
20 stdout-path = "serial0:115200n8";
23 i2c0_imux: i2c0-imux {
24 compatible = "i2c-mux-pinctrl";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 i2c-parent = <&i2c0>;
28 pinctrl-names =
31 pinctrl-0 = <&i2cmux_0>;
[all …]
/linux/arch/riscv/boot/dts/thead/
H A Dth1520-lichee-pi-4a.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "th1520-lichee-module-4a.dtsi"
10 compatible = "sipeed,lichee-pi-4a", "sipeed,lichee-module-4a", "thead,th1520";
19 serial0 = &uart0;
29 stdout-path = "serial0:115200n8";
34 uart0_pins: uart0-0 {
35 tx-pins {
36 pins = "UART0_TXD";
38 bias-disable;
39 drive-strength = <3>;
[all …]
H A Dth1520-beaglev-ahead.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
15 compatible = "beagle,beaglev-ahead", "thead,th1520";
25 serial0 = &uart0;
35 stdout-path = "serial0:115200n8";
44 pinctrl-names = "default";
45 pinctrl-0 = <&led_pins>;
46 compatible = "gpio-leds";
[all …]
/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1-iot-512m.dts1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
8 /dts-v1/;
12 model = "Nuvoton MA35D1-IoT";
13 compatible = "nuvoton,ma35d1-iot", "nuvoton,ma35d1";
16 serial0 = &uart0;
24 stdout-path = "serial0:115200n8";
32 clk_hxt: clock-hxt {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
[all …]
H A Dma35d1-som-256m.dts1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
8 /dts-v1/;
12 model = "Nuvoton MA35D1-SOM";
13 compatible = "nuvoton,ma35d1-som", "nuvoton,ma35d1";
16 serial0 = &uart0;
24 stdout-path = "serial0:115200n8";
32 clk_hxt: clock-hxt {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 compatible = "mediatek,mt8195-evb", "mediatek,mt8195";
14 serial0 = &uart0;
18 stdout-path = "serial0:921600n8";
32 pinctrl-names = "default";
33 pinctrl-0 = <&i2c0_pin>;
34 clock-frequency = <100000>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&i2c1_pin>;
[all …]
H A Dmt8186-evb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 /dts-v1/;
10 chassis-type = "embedded";
11 compatible = "mediatek,mt8186-evb", "mediatek,mt8186";
14 serial0 = &uart0;
18 stdout-path = "serial0:921600n8";
30 clock-frequency = <400000>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&i2c0_pins>;
38 clock-frequency = <400000>;
[all …]
H A Dmt7986b-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
12 chassis-type = "embedded";
13 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b";
16 serial0 = &uart0;
20 stdout-path = "serial0:115200n8";
37 compatible = "mediatek,eth-mac";
39 phy-mode = "2500base-x";
41 fixed-link {
43 full-duplex;
[all …]
/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-pxs3-ref.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 /dts-v1/;
9 #include "uniphier-pxs3.dtsi"
10 #include "uniphier-support-card.dtsi"
14 compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3";
17 stdout-path = "serial0:115200n8";
21 serial0 = &serial0;
58 &serial0 {
71 xirq4-hog {
72 gpio-hog;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-pcb8291.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8291.dts - Device Tree file for PCB8291
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
14 stdout-path = "serial0:115200n8";
18 serial0 = &usart3;
21 gpio-restart {
22 compatible = "gpio-restart";
[all …]
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "dt-bindings/phy/phy-lan966x-serdes.h"
12 serial0 = &usart0;
16 stdout-path = "serial0:115200n8";
19 gpio-restart {
20 compatible = "gpio-restart";
21 pinctrl-0 = <&reset_pins>;
22 pinctrl-names = "default";
29 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
[all …]
H A Dlan966x-pcb8309.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x_pcb8309.dts - Device Tree file for PCB8309
5 /dts-v1/;
7 #include "dt-bindings/phy/phy-lan966x-serdes.h"
10 model = "Microchip EVB - LAN9662";
11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966";
14 serial0 = &usart3;
20 stdout-path = "serial0:115200n8";
23 gpio-restart {
24 compatible = "gpio-restart";
[all …]
/linux/arch/arm64/boot/dts/airoha/
H A Den7581-evb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /dts-v1/;
11 compatible = "airoha,en7581-evb", "airoha,en7581";
14 serial0 = &uart1;
18 stdout-path = "serial0:115200n8";
19 linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>;
30 compatible = "fixed-partitions";
31 #address-cells = <1>;
32 #size-cells = <1>;
37 read-only;
[all …]
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k1000-ref.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "dt-bindings/thermal/thermal.h"
9 #include "loongson-2k1000.dtsi"
12 compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
13 model = "Loongson-2K1000 Reference Board";
16 serial0 = &uart0;
20 stdout-path = "serial0:115200n8";
30 reserved-memory {
31 #address-cells = <2>;
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
16 serial0 = &uart0;
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
26 button-reset {
32 button-wps {
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
21 serial0 = &uart5;
25 stdout-path = "serial0:115200n8";
[all …]
H A Dmsm8939-wingtech-wt82918.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "msm8916-modem-qdsp6.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
13 serial0 = &blsp_uart2;
17 stdout-path = "serial0";
21 compatible = "pwm-backlight";
23 brightness-levels = <0 255>;
24 num-interpolated-steps = <255>;
[all …]
H A Dmsm8916-lg-c50.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
12 chassis-type = "handset";
17 serial0 = &blsp_uart2;
21 stdout-path = "serial0";
24 gpio-keys {
25 compatible = "gpio-keys";
27 pinctrl-0 = <&gpio_keys_default>;
[all …]
H A Dmsm8916-asus-z00l.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
15 chassis-type = "handset";
20 serial0 = &blsp_uart2;
24 stdout-path = "serial0";
[all …]
H A Dipq9574-rdp-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
18 serial0 = &blsp1_uart2;
22 stdout-path = "serial0:115200n8";
26 compatible = "regulator-fixed";
[all …]
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-ebaz4205.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 /include/ "zynq-7000.dtsi"
10 compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
14 serial0 = &uart1;
23 stdout-path = "serial0:115200n8";
28 ps-clk-frequency = <33333333>;
29 fclk-enable = <8>;
34 phy-mode = "mii";
35 phy-handle = <&phy>;
[all …]

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