Searched +full:sdx55 +full:- +full:pcie +full:- +full:ep (Results 1 – 4 of 4) sorted by relevance
1 // SPDX-License-Identifier: BSD-3-Clause6 /dts-v1/;8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>10 #include "qcom-sdx55.dtsi"15 compatible = "qcom,sdx55-telit-fn980-tlb", "qcom,sdx55";16 qcom,board-id = <0xb010008 0x0>;23 stdout-path = "serial0:921600n8";26 reserved-memory {27 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: BSD-3-Clause9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>10 #include <dt-bindings/clock/qcom,rpmh.h>11 #include <dt-bindings/gpio/gpio.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/power/qcom-rpmpd.h>14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>15 #include <dt-bindings/interconnect/qcom,sdx65.h>18 #address-cells = <1>;19 #size-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Qualcomm PCIe Endpoint controller driver18 #include <linux/phy/pcie.h>27 #include "pcie-designware.h"28 #include "pcie-qcom-common.h"157 #define to_pcie_ep(x) dev_get_drvdata((x)->dev)167 * struct qcom_pcie_ep_cfg - Per SoC config struct179 * struct qcom_pcie_ep - Qualcomm PCIe Endpoint Controller180 * @pci: Designware PCIe controller struct181 * @parf: Qualcomm PCIe specific PARF register base[all …]
1 // SPDX-License-Identifier: GPL-2.07 #include <linux/clk-provider.h>17 #include <linux/phy/pcie.h>25 #include <dt-bindings/phy/phy-qcom-qmp.h>27 #include "phy-qcom-qmp-common.h"29 #include "phy-qcom-qmp.h"30 #include "phy-qcom-qmp-pcs-misc-v3.h"31 #include "phy-qcom-qmp-pcs-pcie-v4.h"32 #include "phy-qcom-qmp-pcs-pcie-v4_20.h"33 #include "phy-qcom-qmp-pcs-pcie-v5.h"[all …]