/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Veyron (and derivatives) fragment for sdmmc cards 10 mmc1 = &sdmmc; 15 sdcard-supply = <&vccio_sd>; 19 sdmmc { 21 * We run sdmmc at max speed; bump up drive strength. 24 sdmmc_bus4: sdmmc-bus4 { 31 sdmmc_clk: sdmmc-clk { 35 sdmmc_cmd: sdmmc-cmd { 45 sdmmc_cd_disabled: sdmmc-cd-disabled { [all …]
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H A D | rv1126-sonoff-ihost.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 mmc2 = &sdmmc; 16 stdout-path = "serial2:1500000n8"; 19 vcc5v0_sys: regulator-vcc5v0-sys { 20 compatible = "regulator-fixed"; 21 regulator-name = "vcc5v0_sys"; 22 regulator-always-on; 23 regulator-boot-on; 24 regulator-min-microvolt = <5000000>; 25 regulator-max-microvolt = <5000000>; [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-rock960.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/irq.h> 14 mmc1 = &sdmmc; 18 sdio_pwrseq: sdio-pwrseq { 19 compatible = "mmc-pwrseq-simple"; 21 clock-names = "ext_clock"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&wifi_enable_h>; 24 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 27 vcc12v_dcin: regulator-vcc12v-dcin { [all …]
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H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 9 #include "rk3399-op1.dtsi" 13 mmc0 = &sdmmc; 18 stdout-path = "serial2:115200n8"; 27 * - Rails that only connect to the EC (or devices that the EC talks to) 29 * - Rails _are_ included if the rails go to the AP even if the AP 38 * - The EC controls the enable and the EC always enables a rail as 40 * - The rails are actually connected to each other by a jumper and [all …]
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H A D | rk3399-rock-4c-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 10 #include "rk3399-t.dtsi" 14 compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; 19 mmc1 = &sdmmc; 23 stdout-path = "serial2:1500000n8"; 26 clkin_gmac: external-gmac-clock { 27 compatible = "fixed-clock"; 28 clock-frequency = <125000000>; [all …]
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H A D | rk3328-orangepi-r1-plus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Based on rk3328-nanopi-r2s.dts, which is: 4 * Copyright (c) 2020 David Bauer <mail@david-bauer.net> 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 17 mmc0 = &sdmmc; 21 stdout-path = "serial2:1500000n8"; 24 gmac_clk: gmac-clock { 25 compatible = "fixed-clock"; [all …]
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H A D | rk3399-nanopi4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * RK3399-based FriendlyElec boards device tree source 14 /dts-v1/; 15 #include <dt-bindings/input/linux-event-codes.h> 22 mmc1 = &sdmmc; 27 stdout-path = "serial2:1500000n8"; 30 clkin_gmac: external-gmac-clock { 31 compatible = "fixed-clock"; 32 clock-frequency = <125000000>; 33 clock-output-names = "clkin_gmac"; [all …]
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H A D | px30-firefly-jd4-core-mb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/leds/common.h> 9 #include "px30-firefly-jd4-core.dtsi" 12 compatible = "firefly,px30-jd4-core-mb", "firefly,px30-jd4-core", 14 model = "Firefly Core-PX30-JD4 on MB-JD4-PX30 baseboard"; 18 mmc0 = &sdmmc; 24 stdout-path = "serial2:115200n8"; 27 dc_12v: regulator-dc-12v { [all …]
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H A D | px30-ringneck-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "px30-ringneck.dtsi" 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 12 model = "Theobroma Systems PX30-uQ7 SoM on Haikou devkit"; 13 compatible = "tsd,px30-ringneck-haikou", "rockchip,px30"; 17 mmc2 = &sdmmc; 21 stdout-path = "serial0:115200n8"; 24 gpio-keys { [all …]
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H A D | rk3399-roc-pc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 12 model = "Firefly ROC-RK3399-PC Board"; 13 compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; 17 mmc0 = &sdmmc; 22 stdout-path = "serial2:1500000n8"; 26 compatible = "pwm-backlight"; [all …]
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H A D | rk3399-sapphire.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "dt-bindings/pwm/pwm.h" 7 #include "dt-bindings/input/input.h" 11 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399"; 15 mmc0 = &sdmmc; 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; [all …]
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H A D | rk3399-kobol-helios64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 13 /dts-v1/; 22 mmc0 = &sdmmc; 26 avdd_0v9_s0: regulator-avdd-0v9-s0 { 27 compatible = "regulator-fixed"; 28 regulator-name = "avdd_0v9_s0"; 29 regulator-always-on; 30 regulator-boot-on; 31 regulator-min-microvolt = <900000>; 32 regulator-max-microvolt = <900000>; [all …]
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H A D | rk3588-friendlyelec-cm3588.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/rockchip.h> 22 mmc1 = &sdmmc; 26 stdout-path = "serial2:1500000n8"; 30 compatible = "gpio-leds"; 32 led_sys: led-0 { 36 linux,default-trigger = "heartbeat"; [all …]
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H A D | rk3399-leez-p710.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 19 mmc1 = &sdmmc; 24 stdout-path = "serial2:1500000n8"; 27 clkin_gmac: external-gmac-clock { 28 compatible = "fixed-clock"; 29 clock-frequency = <125000000>; [all …]
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H A D | rk3399-pinephone-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf 12 /dts-v1/; 13 #include <dt-bindings/input/gpio-keys.h> 14 #include <dt-bindings/input/linux-event-codes.h> 15 #include <dt-bindings/leds/common.h> 16 #include "rk3399-s.dtsi" 20 compatible = "pine64,pinephone-pro", "rockchip,rk3399"; 21 chassis-type = "handset"; 25 mmc1 = &sdmmc; [all …]
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H A D | rk3399-rock-pi-4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/pwm/pwm.h> 15 mmc1 = &sdmmc; 19 stdout-path = "serial2:1500000n8"; 22 clkin_gmac: external-gmac-clock { 23 compatible = "fixed-clock"; 24 clock-frequency = <125000000>; 25 clock-output-names = "clkin_gmac"; [all …]
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H A D | rk3399-hugsun-x99.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /dts-v1/; 3 #include <dt-bindings/pwm/pwm.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/interrupt-controller/irq.h> 15 mmc1 = &sdmmc; 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; [all …]
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H A D | rk3399-orangepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/pwm/pwm.h" 9 #include "dt-bindings/input/input.h" 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "dt-bindings/usb/pd.h" 16 compatible = "xunlong,rk3399-orangepi", "rockchip,rk3399"; 21 mmc1 = &sdmmc; 26 stdout-path = "serial2:1500000n8"; 29 clkin_gmac: external-gmac-clock { [all …]
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H A D | rk3588s-nanopi-r6.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/pinctrl/rockchip.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/soc/rockchip,vop2.h> 14 mmc0 = &sdmmc; 19 stdout-path = "serial2:1500000n8"; 22 adc-keys { 23 compatible = "adc-keys"; [all …]
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H A D | rk3399-khadas-edge.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pwm/pwm.h> 16 mmc1 = &sdmmc; 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gmac-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; [all …]
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H A D | rk3399-rockpro64.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 15 mmc1 = &sdmmc; 20 stdout-path = "serial2:1500000n8"; 25 compatible = "pwm-backlight"; 26 brightness-levels = <0 4 8 16 32 64 128 255>; 27 default-brightness-level = <5>; 32 clkin_gmac: external-gmac-clock { 33 compatible = "fixed-clock"; [all …]
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/linux/arch/arm/boot/dts/nxp/lpc/ |
H A D | lpc4357-ea4357-devkit.dts | 9 * Released under the terms of 3-clause BSD License 13 /dts-v1/; 18 #include "dt-bindings/input/input.h" 19 #include "dt-bindings/gpio/gpio.h" 23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350"; 33 stdout-path = &uart0; 42 compatible = "regulator-fixed"; 43 regulator-name = "3v3-supply"; 44 regulator-min-microvolt = <3300000>; 45 regulator-max-microvolt = <3300000>; [all …]
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H A D | lpc4357-myd-lpc4357.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel 5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 8 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "myir,myd-lpc4357", "nxp,lpc4357"; 20 stdout-path = "serial3:115200n8"; 29 compatible = "gpio-leds"; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&led_pins>; [all …]
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/linux/Documentation/devicetree/bindings/mmc/ |
H A D | synopsys-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 16 - altr,socfpga-dw-mshc 17 - img,pistachio-dw-mshc 18 - snps,dw-mshc 33 clock-names: 35 - const: biu [all …]
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/linux/drivers/soc/rockchip/ |
H A D | io-domain.c | 1 // SPDX-License-Identifier: GPL-2.0-only 26 * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the 28 * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider 75 int (*write)(struct rockchip_iodomain_supply *supply, int uV); 83 int (*write)(struct rockchip_iodomain_supply *supply, int uV); 86 static int rk3568_iodomain_write(struct rockchip_iodomain_supply *supply, int uV) in rk3568_iodomain_write() argument 88 struct rockchip_iodomain *iod = supply->iod; in rk3568_iodomain_write() 93 switch (supply->idx) { in rk3568_iodomain_write() 97 b = supply->idx; in rk3568_iodomain_write() 99 b = supply->idx + 4; in rk3568_iodomain_write() [all …]
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