/freebsd/sys/contrib/device-tree/Bindings/interconnect/ |
H A D | qcom,sdm845.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sdm845.yaml# 7 title: Qualcomm SDM845 Network-On-Chip Interconnect 13 SDM845 interconnect providers support system bandwidth requirements through 26 - qcom,sdm845-aggre1-noc 27 - qcom,sdm845-aggre2-noc 28 - qcom,sdm845-config-noc 29 - qcom,sdm845-dc-noc 30 - qcom,sdm845-gladiator-noc 31 - qcom,sdm845-mem-noc 32 - qcom,sdm845-mmss-noc [all …]
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H A D | qcom,rpmh.yaml | 58 - qcom,sdm845-aggre1-noc 59 - qcom,sdm845-aggre2-noc 60 - qcom,sdm845-config-noc 61 - qcom,sdm845-dc-noc 62 - qcom,sdm845-gladiator-noc 63 - qcom,sdm845-mem-noc 64 - qcom,sdm845-mmss-noc 65 - qcom,sdm845-system-noc 127 #include <dt-bindings/interconnect/qcom,sdm845.h> 130 compatible = "qcom,sdm845 [all...] |
H A D | qcom,msm8998-bwmon.yaml | 16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845:: 32 - qcom,sdm845-cpu-bwmon 38 - const: qcom,sdm845-bwmon # BWMON v4, unified register space 49 - const: qcom,sdm845-llcc-bwmon # BWMON v5 105 #include <dt-bindings/interconnect/qcom,sdm845.h> 109 compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sdm845-lg-judyp.dts | 3 * SDM845 LG V35 (judyp) device tree. 10 #include "sdm845-lg-common.dtsi" 14 compatible = "lg,judyp", "qcom,sdm845"; 29 firmware-name = "qcom/sdm845/judyp/adsp.mbn"; 33 firmware-name = "qcom/sdm845/judyp/cdsp.mbn"; 38 firmware-name = "qcom/sdm845/judyp/a630_zap.mbn"; 43 firmware-name = "qcom/sdm845/judyp/mba.mbn", "qcom/sdm845/judyp/modem.mbn";
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H A D | sdm845-lg-judyln.dts | 3 * SDM845 LG G7 (judyln) device tree. 10 #include "sdm845-lg-common.dtsi" 14 compatible = "lg,judyln", "qcom,sdm845"; 43 firmware-name = "qcom/sdm845/judyln/adsp.mbn"; 47 firmware-name = "qcom/sdm845/judyln/cdsp.mbn"; 52 firmware-name = "qcom/sdm845/judyln/a630_zap.mbn"; 57 firmware-name = "qcom/sdm845/judyln/mba.mbn", "qcom/sdm845/judyln/modem.mbn";
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H A D | sdm845-cheza-r1.dts | 10 #include "sdm845-cheza.dtsi" 14 compatible = "google,cheza-rev1", "qcom,sdm845"; 17 * FIXED REGULATORS (not in sdm845-cheza.dtsi) - parents above children 52 /* FIXED REGULATOR OVERRIDES (modifications to sdm845-cheza.dtsi) */ 82 * (modifications to sdm845-cheza.dtsi) - alphabetized by dtsi label
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | qcom,gcc-sdm845.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SDM670 and SDM845 15 domains on SDM670 and SDM845 17 See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h 23 - qcom,gcc-sdm845 63 const: qcom,gcc-sdm845 84 # Example for GCC for SDM845: 88 compatible = "qcom,gcc-sdm845";
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H A D | qcom,sdm845-dispcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-dispcc.yaml# 7 title: Qualcomm Display Clock & Reset Controller on SDM845 14 domains on SDM845. 16 See also:: include/dt-bindings/clock/qcom,dispcc-sdm845.h 20 const: qcom,sdm845-dispcc 22 # NOTE: sdm845.dtsi existed for quite some time and specified no clocks. 74 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 77 compatible = "qcom,sdm845-dispcc";
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H A D | qcom,sdm845-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-gpucc.yaml# 7 title: Qualcomm Graphics Clock & Reset Controller Binding for SDM845 14 power domains on SDM845. 16 See also dt-bindings/clock/qcom,gpucc-sdm845.h. 20 const: qcom,sdm845-gpucc 59 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 62 compatible = "qcom,sdm845-gpucc";
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H A D | qcom,sdm845-lpasscc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-lpasscc.yaml# 7 title: Qualcomm SDM845 LPASS Clock Controller 13 Qualcomm SDM845 LPASS (Low Power Audio SubSystem) Clock Controller. 15 See also:: include/dt-bindings/clock/qcom,lpass-sdm845.h 19 const: qcom,sdm845-lpasscc 43 compatible = "qcom,sdm845-lpasscc";
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H A D | qcom,sdm845-videocc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-videocc.yaml# 7 title: Qualcomm Video Clock & Reset Controller Binding for SDM845 14 power domains on SDM845. 16 See also dt-bindings/clock/qcom,videocc-sdm845.h. 20 const: qcom,sdm845-videocc 57 compatible = "qcom,sdm845-videocc";
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H A D | qcom,sdm845-camcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-camcc.yaml# 7 title: Qualcomm Camera Clock & Reset Controller on SDM845 14 domains on SDM845. 23 const: qcom,sdm845-camcc 47 compatible = "qcom,sdm845-camcc";
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | qcom,sdm845-mdss.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml# 7 title: Qualcomm SDM845 Display MDSS 15 bindings of MDSS are mentioned for SDM845 target. 21 const: qcom,sdm845-mdss 49 const: qcom,sdm845-dpu 57 const: qcom,sdm845-dp 66 - const: qcom,sdm845-dsi-ctrl 84 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 85 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 93 compatible = "qcom,sdm845 [all...] |
H A D | dpu-sdm845.yaml | 4 $id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml# 7 title: Qualcomm Display DPU dt properties for SDM845 target 15 bindings of MDSS and DPU are mentioned for SDM845 target. 20 - const: qcom,sdm845-mdss 73 - const: qcom,sdm845-dpu 155 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 156 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 163 compatible = "qcom,sdm845-mdss"; 181 compatible = "qcom,sdm845-dpu";
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H A D | qcom,sdm845-dpu.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml# 7 title: Qualcomm Display DPU on SDM845 18 - qcom,sdm845-dpu 57 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 58 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 62 compatible = "qcom,sdm845-dpu";
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
H A D | qcom,sdm845-adsp-pil.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml# 7 title: Qualcomm SDM845 ADSP Peripheral Image Loader 19 - qcom,sdm845-adsp-pil 118 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 119 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 121 #include <dt-bindings/reset/qcom,sdm845-pdc.h> 122 #include <dt-bindings/reset/qcom,sdm845-aoss.h> 124 compatible = "qcom,sdm845-adsp-pil";
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H A D | qcom,msm8996-mss-pil.yaml | 23 - qcom,sdm845-mss-pil 70 - description: MSS power domain (only valid for qcom,sdm845-mss-pil) 77 - const: mss # only valid for qcom,sdm845-mss-pil 86 - description: PDC reset (only valid for qcom,sdm845-mss-pil) 92 - const: pdc_reset # only valid for qcom,sdm845-mss-pil 277 const: qcom,sdm845-mss-pil 337 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 341 #include <dt-bindings/reset/qcom,sdm845-aoss.h> 342 #include <dt-bindings/reset/qcom,sdm845-pdc.h> 345 compatible = "qcom,sdm845 [all...] |
H A D | qcom,adsp.yaml | 27 - qcom,sdm845-adsp-pas 28 - qcom,sdm845-cdsp-pas 29 - qcom,sdm845-slpi-pas 72 - qcom,sdm845-adsp-pas 73 - qcom,sdm845-cdsp-pas 74 - qcom,sdm845-slpi-pas 96 - qcom,sdm845-adsp-pas 97 - qcom,sdm845-cdsp-pas 98 - qcom,sdm845-slpi-pas 156 - qcom,sdm845 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | qcom,sdm845-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdm845-pinctrl.yaml# 7 title: Qualcomm SDM845 TLMM pin controller 14 Top Level Mode Multiplexer pin controller in Qualcomm SDM845 SoC. 21 const: qcom,sdm845-pinctrl 39 - $ref: "#/$defs/qcom-sdm845-tlmm-state" 42 $ref: "#/$defs/qcom-sdm845-tlmm-state" 50 qcom-sdm845-tlmm-state: 113 compatible = "qcom,sdm845-pinctrl";
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/freebsd/sys/contrib/device-tree/Bindings/reset/ |
H A D | qcom,aoss-reset.yaml | 22 - const: qcom,sdm845-aoss-cc 27 - const: qcom,sdm845-aoss-cc 29 - description: on SDM845 SoCs the following compatibles must be specified 31 - const: qcom,sdm845-aoss-cc 49 compatible = "qcom,sdm845-aoss-cc";
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H A D | qcom,pdc-global.yaml | 22 - const: qcom,sdm845-pdc-global 28 - description: on SDM845 SoCs the following compatibles must be specified 30 - const: qcom,sdm845-pdc-global 48 compatible = "qcom,sdm845-pdc-global";
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | qcom,sdm845.txt | 1 * Qualcomm Technologies Inc. SDM845 ASoC sound card driver 3 This binding describes the SDM845 sound card, which uses qdsp for audio. 9 "qcom,sdm845-sndcard" 68 compatible = "qcom,sdm845-sndcard"; 69 model = "sdm845-snd-card";
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | qcom,sdm845-venus-v2.yaml | 4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml# 7 title: Qualcomm SDM845 Venus v2 video encode and decode accelerators 21 const: qcom,sdm845-venus-v2 99 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 102 compatible = "qcom,sdm845-venus-v2";
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H A D | qcom,sdm845-venus.yaml | 4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml# 7 title: Qualcomm SDM845 Venus video encode and decode accelerators 21 const: qcom,sdm845-venus 101 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 104 compatible = "qcom,sdm845-venus";
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | qcom,qmp-phy.yaml | 37 - qcom,sdm845-qhp-pcie-phy 38 - qcom,sdm845-qmp-pcie-phy 39 - qcom,sdm845-qmp-ufs-phy 40 - qcom,sdm845-qmp-usb3-phy 41 - qcom,sdm845-qmp-usb3-uni-phy 137 - qcom,sdm845-qmp-usb3-uni-phy 285 - qcom,sdm845-qmp-ufs-phy 342 - qcom,sdm845-qhp-pcie-phy 343 - qcom,sdm845-qmp-pcie-phy 469 #include <dt-bindings/clock/qcom,gcc-sdm845.h> [all …]
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