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Searched +full:sdm845 +full:- +full:llcc (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,msm8998-bwmon.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
17 - Measuring the bandwidth between CPUs and Last Level Cache Controller -
19 - Measuring the bandwidth between Last Level Cache Controller and memory
20 (DDR) - called LLCC BWMON.
25 - const: qcom,msm8998-bwmon # BWMON v4
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/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
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/linux/arch/arm64/boot/dts/qcom/
H A Dsdm850-samsung-w737.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include "sdm845-wcd9340.dtsi"
21 * Update following upstream (sdm845.dtsi) reserved
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