Home
last modified time | relevance | path

Searched +full:sdm845 +full:- +full:dpu (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sdm845-dpu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU on SDM845
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
12 $ref: /schemas/display/msm/dpu-common.yaml#
17 - qcom,sdm670-dpu
18 - qcom,sdm845-dpu
22 - description: Address offset and size for mdp register set
[all …]
H A Dqcom,sdm845-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDM845 Display MDSS
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS are mentioned for SDM845 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sdm845-mdss
[all …]
H A Dqcom,sdm670-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm670-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Acayan <mailingradian@gmail.com>
13 SDM670 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sdm670-mdss
24 - description: Display AHB clock from gcc
[all …]
H A Dqcom,sc7180-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7180-mdss
25 - description: Display AHB clock from gcc
26 - description: Display AHB clock from dispcc
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
5 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
13 #include <linux/dma-buf.h>
66 struct dpu_kms *kms = s->private; in _dpu_danger_signal_status()
69 if (!kms->hw_mdp) { in _dpu_danger_signal_status()
76 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status()
79 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
80 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
84 if (kms->hw_mdp->ops.get_safe_status) in _dpu_danger_signal_status()
[all …]
/linux/drivers/gpu/drm/msm/
H A Dmsm_mdss.c2 * SPDX-License-Identifier: GPL-2.0
56 path0 = devm_of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path()
60 msm_mdss->mdp_path[0] = path0; in msm_mdss_parse_data_bus_icc_path()
61 msm_mdss->num_mdp_paths = 1; in msm_mdss_parse_data_bus_icc_path()
63 path1 = devm_of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path()
65 msm_mdss->mdp_path[1] = path1; in msm_mdss_parse_data_bus_icc_path()
66 msm_mdss->num_mdp_paths++; in msm_mdss_parse_data_bus_icc_path()
69 reg_bus_path = of_icc_get(dev, "cpu-cfg"); in msm_mdss_parse_data_bus_icc_path()
71 msm_mdss->reg_bus_path = reg_bus_path; in msm_mdss_parse_data_bus_icc_path()
84 interrupts = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_INTR_STATUS); in msm_mdss_irq()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM670 SoC device tree source, adapted from SDM845 SoC device tree
9 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
12 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
13 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
14 #include <dt-bindings/clock/qcom,rpmh.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/gpio/gpio.h>
[all …]
H A Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
16 interrupt-parent = <&intc>;
[all …]
H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
[all …]