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/linux/arch/arm64/boot/dts/renesas/
H A Drzg2lc-smarc-som.dtsi54 vccq_sdhi0: regulator-vccq-sdhi0 {
57 regulator-name = "SDHI0 VccQ";
280 &sdhi0 {
295 &sdhi0 {
H A Drzg2ul-smarc-som.dtsi47 vccq_sdhi0: regulator-vccq-sdhi0 {
50 regulator-name = "SDHI0 VccQ";
299 &sdhi0 {
313 &sdhi0 {
H A Drzg2l-smarc-som.dtsi65 vccq_sdhi0: regulator-vccq-sdhi0 {
68 regulator-name = "SDHI0 VccQ";
361 &sdhi0 {
376 &sdhi0 {
H A Dr9a09g011-v2mevk2.dts83 vccq_sdhi0: regulator-vccq-sdhi0 {
86 regulator-name = "SDHI0 VccQ";
254 &sdhi0 {
H A Dr8a774b1-beacon-rzg2n-kit.dts34 mmc1 = &sdhi0;
H A Dr8a774a1-beacon-rzg2m-kit.dts33 mmc1 = &sdhi0;
H A Dr8a774e1-beacon-rzg2h-kit.dts34 mmc1 = &sdhi0;
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7743-iwg20m.dtsi51 function = "sdhi0";
87 &sdhi0 {
H A Dr8a7744-iwg20m.dtsi46 function = "sdhi0";
82 &sdhi0 {
/linux/arch/sh/kernel/cpu/sh2a/
H A Dsetup-sh7269.c45 SDHI0, SDHI1, enumerator
175 INTC_IRQ(SDHI0, 332), INTC_IRQ(SDHI0, 333),
176 INTC_IRQ(SDHI0, 334),
235 { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } },
H A Dclock-sh7264.c98 [MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
127 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7723.c470 SDHI1, RTC, DMAC1B, SDHI0, enumerator
534 INTC_VECT(SDHI0, 0xE80),
535 INTC_VECT(SDHI0, 0xEA0),
536 INTC_VECT(SDHI0, 0xEC0),
620 { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } },
H A Dsetup-sh7724.c895 DMAC1B, DMAC0B, I2C0, I2C1, SDHI0, SDHI1, SPU, MMCIF, enumerator
968 INTC_VECT(SDHI0, 0xE80),
969 INTC_VECT(SDHI0, 0xEA0),
970 INTC_VECT(SDHI0, 0xEC0),
971 INTC_VECT(SDHI0, 0xEE0),
1072 { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC, DMAC1B, 0, SDHI0 } },
H A Dsetup-sh7734.c321 SDHI0, SDHI1, enumerator
405 INTC_VECT(SDHI0, 0xAE0),
437 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2),
H A Dclock-sh7734.c105 MSTP323, /* SDHI0 */
219 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP323]),
/linux/arch/sh/boards/mach-ap325rxa/
H A Dsetup.c307 /* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */
318 .name = "SDHI0",
335 .id = 0, /* "sdhi0" clock */
502 /* SDHI0 - CN3 - SD CARD */ in ap325rxa_devices_setup()
/linux/arch/sh/include/cpu-sh4/cpu/
H A Dsh7723.h169 /* SDHI0 (PTD) */
175 /* SDHI0 (PTS) */
H A Dsh7724.h245 /* SDHI0 (PTY) */
/linux/arch/sh/boards/mach-kfr2r09/
H A Dsetup.c301 /* Fixed 3.3V regulator to be used by SDHI0 */
310 .name = "SDHI0",
571 /* SDHI0 connected to yc304 */ in kfr2r09_devices_setup()
/linux/arch/sh/boards/mach-se/7724/
H A Dsetup.c449 /* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
460 .name = "SDHI0",
859 /* SDHI0 connected to cn7 */ in devices_setup()
/linux/arch/sh/boards/
H A Dboard-sh7757lcr.c193 /* Fixed 3.3V regulator to be used by SDHI0, MMCIF */
238 /* SDHI0 */
/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,pfc.yaml193 function = "sdhi0";
/linux/Documentation/devicetree/bindings/mmc/
H A Drenesas,sdhi.yaml229 sdhi0: mmc@ee100000 {
/linux/drivers/clk/renesas/
H A Dr8a7792-cpg-mssr.c96 DEF_MOD("sdhi0", 314, R8A7792_CLK_SD),
H A Dr8a77470-cpg-mssr.c95 DEF_MOD("sdhi0", 314, R8A77470_CLK_SD0),

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