Searched +full:sdhci +full:- +full:esdhc +full:- +full:imx (Results 1 – 3 of 3) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | fsl-imx-esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: sdhci-common.yaml# 20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 25 - enum: 26 - fsl,imx25-esdhc [all …]
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H A D | fsl-imx-esdhc.txt | 1 * Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 7 by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 10 - compatible : Should be "fsl,<chip>-esdhc", the supported chips include 11 "fsl,imx25-esdhc" 12 "fsl,imx35-esdhc" 13 "fsl,imx51-esdhc" 14 "fsl,imx53-esdhc" 15 "fsl,imx6q-usdhc" 16 "fsl,imx6sl-usdhc" 17 "fsl,imx6sx-usdhc" [all …]
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/freebsd/sys/dev/sdhci/ |
H A D | fsl_sdhci.c | 1 /*- 29 * SDHCI driver glue for Freescale i.MX SoC and QorIQ families. 31 * This supports both eSDHC (earlier SoCs) and uSDHC (more recent SoCs). 58 #include <arm/freescale/imx/imx_ccmvar.h> 72 #include <dev/sdhci/sdhci.h> 73 #include <dev/sdhci/sdhci_fdt_gpio.h> 105 * Freescale-specific registers, or in some cases the layout of bits within the 106 * sdhci-defined register is different on Freescale. These names all begin with 112 #define SDHC_VEND_SPEC 0xC0 /* Vendor-specific register. */ 161 * The clock enable bits exist in different registers for ESDHC vs USDHC, but [all …]
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