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Searched +full:sdhci +full:- +full:caps +full:- +full:mask (Results 1 – 21 of 21) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci.txt7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
9 is on in the mask then the bit is incorrect in the register and should be
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
H A Dsdhci-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SDHCI Controller Common Properties
10 - Adrian Hunter <adrian.hunter@intel.com>
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
17 sdhci-caps:
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
23 sdhci-caps-mask:
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H A Dsdhci-am654.txt1 Device Tree Bindings for the SDHCI Controllers present on TI's AM654 SOCs
7 [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
11 - compatible: should be one of:
12 "ti,am654-sdhci-5.1": SDHCI on AM654 device.
13 "ti,j721e-sdhci-8bit": 8 bit SDHCI on J721E device.
14 "ti,j721e-sdhci-4bit": 4 bit SDHCI on J721E device.
15 - reg: Must be two entries.
16 - The first should be the sdhci register space
17 - The second should the subsystem/phy register space
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H A Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
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H A Daspeed-bmc-facebook-wedge400.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include "ast2500-facebook-netbmc-common.dtsi"
10 compatible = "facebook,wedge400-bm
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/freebsd/sys/dev/sdhci/
H A Dsdhci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 #include <dev/sdhci/sdhci.h>
68 SYSCTL_NODE(_hw, OID_AUTO, sdhci, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
69 "sdhci driver");
76 0, "Mask of quirks to clear");
79 "Mask of quirks to set");
81 #define RD1(slot, off) SDHCI_READ_1((slot)->bus, (slot), (off))
82 #define RD2(slot, off) SDHCI_READ_2((slot)->bus, (slot), (off))
83 #define RD4(slot, off) SDHCI_READ_4((slot)->bus, (slot), (off))
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H A Dsdhci_fsl_fdt.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2020 - 2021 Alstom Group.
5 * Copyright (c) 2020 - 2021 Semihalf.
49 #include <dev/sdhci/sdhci.h>
50 #include <dev/sdhci/sdhci_fdt_gpio.h>
56 #define RD4 (sc->read)
57 #define WR4 (sc->write)
219 .syscon_compat = "fsl,ls1012a-scfg",
234 .syscon_compat = "fsl,ls1046a-scfg",
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H A Dsdhci_xenon.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 * Marvell Xenon SDHCI controller driver.
54 #include <dev/sdhci/sdhci.h>
55 #include <dev/sdhci/sdhci_xenon.h>
71 return (bus_read_1(sc->mem_res, off)); in sdhci_xenon_read_1()
80 bus_write_1(sc->mem_res, off, val); in sdhci_xenon_write_1()
89 return (bus_read_2(sc->mem_res, off)); in sdhci_xenon_read_2()
98 bus_write_2(sc->mem_res, off, val); in sdhci_xenon_write_2()
107 return bus_read_4(sc->mem_res, off); in sdhci_xenon_read_4()
[all …]
H A Dsdhci.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 /* Controller has an off-by-one issue with timeout value */
62 /* Hardware shifts the 136-bit response, don't do it in software. */
64 /* Wait to see reset bit asserted before waiting for de-asserted */
72 /* All controller slots are non-removable. */
74 /* Issue custom Intel controller reset sequence after power-up. */
96 /* SDMA boundary in SDHCI_BLOCK_SIZE broken - use front-end supplied value. */
271 #define SDHCI_CTRL2_MMC_HS400 0x0005 /* non-standard */
311 #define SDHCI_CAN_MMC_HS400 0x80000000 /* non-standard */
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-sama7g54_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g54_curiosity.dts - Device Tree file for SAMA7G54 Curiosity Board
10 /dts-v1/;
11 #include "sama7g5-pinfunc.h"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
16 #include <dt-bindings/pinctrl/at91.h>
20 compatible = "microchip,sama7g54-curiosity", "microchip,sama7g5", "microchip,sama7";
28 stdout-path = "serial0:115200n8";
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H A Dat91-sama7g5ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
11 /dts-v1/;
12 #include "sama7g5-pinfunc.h"
14 #include <dt-bindings/mfd/atmel-flexcom.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/pinctrl/at91.h>
17 #include <dt-bindings/sound/microchip,pdmc.h>
20 model = "Microchip SAMA7G5-EK";
25 stdout-path = "serial0:115200n8";
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-nitrogen-r2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
11 compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
13 reg_vref_1v8: regulator-vref-1v8 {
14 compatible = "regulator-fixed";
15 regulator-name = "vref-
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_coreaon>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
17 compatible = "simple-pm-bus";
18 #address-cells = <1>;
19 #size-cells = <1>;
50 target-module@2000 { /* 0x4a002000, ap 3 08.0 */
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
H A Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
H A Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
8 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
8 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
11 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
12 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-3720-turris-mox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
6 #include <dt-bindings/pwm/pwm.h>
15 brightness-levels = <0 45 63 88 119 158 203 255>;
16 compatible = "pwm-backlight";
17 default-brightness-level = <4>;
18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
21 power-supply = <&reg_module_3v3>;
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