/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxl-s905x-khadas-vim.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxl-s905x-p212.dtsi" 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/sound/meson-aiu.h> 13 compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl"; 16 adc-keys { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 0>; 19 io-channel-names = "buttons"; [all …]
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H A D | meson-s4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/meson-s4-gpio.h> 10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h> 12 #include <dt-bindings/power/meson-s4-power.h> 13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h> 17 #address-cells = <2>; [all …]
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H A D | amlogic-c3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> [all …]
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H A D | meson-gxbb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gx.dtsi" 7 #include "meson-gx-mali450.dtsi" 8 #include <dt-bindings/gpio/meson-gxbb-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 10 #include <dt-bindings/clock/gxbb-clkc.h> 11 #include <dt-bindings/clock/gxbb-aoclkc.h> 12 #include <dt-bindings/reset/gxbb-aoclkc.h> 15 compatible = "amlogic,meson-gxbb"; 19 compatible = "amlogic,meson-gxbb-usb2-phy"; [all …]
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H A D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 18 compatible = "amlogic,meson-gxl-usb-ctrl"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8916-lg-c50.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 /dts-v1/; 5 #include "msm8916-pm8916.dtsi" 7 #include <dt-bindings/gpio/gpio.h> 12 chassis-type = "handset"; 21 stdout-path = "serial0"; 24 gpio-keys { 25 compatible = "gpio-keys"; 27 pinctrl-0 = <&gpio_keys_default>; 28 pinctrl-names = "default"; [all …]
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H A D | msm8916-asus-z00l.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 /dts-v1/; 5 #include "msm8916-pm8916.dtsi" 6 #include "msm8916-modem-qdsp6.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 15 chassis-type = "handset"; 24 stdout-path = "serial0"; 27 gpio-keys { [all …]
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H A D | sm6115p-lenovo-j606f.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 /dts-v1/; 14 chassis-type = "tablet"; 17 qcom,msm-id = <445 0x10000>, <420 0x10000>; 18 qcom,board-id = <34 3>; 25 #address-cells = <2>; 26 #size-cells = <2>; 30 compatible = "simple-framebuffer"; 40 gpio-keys { 41 compatible = "gpio-keys"; [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 15 sdcard-supply = <&vccio_sd>; 24 sdmmc_bus4: sdmmc-bus4 { 25 rockchip,pins = <6 RK_PC0 1 &pcfg_pull_none_drv_8ma>, 31 sdmmc_clk: sdmmc-clk { 32 rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>; 35 sdmmc_cmd: sdmmc-cmd { 36 rockchip,pins = <6 RK_PC5 1 &pcfg_pull_none_drv_8ma>; 45 sdmmc_cd_disabled: sdmmc-cd-disabled { 46 rockchip,pins = <6 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; [all …]
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H A D | rk3288-firefly-reload-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 16 ext_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <125000000>; 20 clock-output-names = "ext_gmac"; 24 vcc_flash: flash-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc_flash"; [all …]
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H A D | rk3288-vmarc-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288"; 14 vccio_flash: vccio-flash-regulator { 15 compatible = "regulator-fixed"; 16 regulator-name = "vccio_flash"; 17 regulator-min-microvolt = <1800000>; 18 regulator-max-microvolt = <1800000>; 19 vin-supply = <&vcc_io>; [all …]
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H A D | rk3288-miqi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 15 stdout-path = "serial2:115200n8"; 23 ext_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <125000000>; 27 clock-output-names = "ext_gmac"; 31 compatible = "gpio-leds"; [all …]
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H A D | rk3288-rock2-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/pwm/pwm.h> 12 emmc_pwrseq: emmc-pwrseq { 13 compatible = "mmc-pwrseq-emmc"; 14 pinctrl-0 = <&emmc_reset>; 15 pinctrl-names = "default"; 16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; [all …]
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H A D | rk3288-phycore-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device tree file for Phytec phyCORE-RK3288 SoM 8 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 29 ext_gmac: external-gmac-clock { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <125000000>; 33 clock-output-names = "ext_gmac"; 36 leds: user-leds { [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mp-icore-mx8mp-edimm2.2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 11 #include "imx8mp-icore-mx8mp.dtsi" 12 #include <dt-bindings/usb/pd.h> 16 compatible = "engicam,icore-mx8mp-edimm2.2", "engicam,icore-mx8mp", 20 stdout-path = &uart2; 23 reg_usb1_vbus: regulator-usb1 { 24 compatible = "regulator-fixed"; 25 enable-active-high; 27 pinctrl-names = "default"; [all …]
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H A D | imx8mm-nitrogen-r2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 11 compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; 13 reg_vref_1v8: regulator-vref-1v8 { 14 compatible = "regulator-fixed"; 15 regulator-name = "vref-1v8"; 16 regulator-min-microvolt = <1800000>; 17 regulator-max-microvolt = <1800000>; 20 reg_vref_3v3: regulator-vref-3v3 { 21 compatible = "regulator-fixed"; [all …]
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/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos7-espresso.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/samsung,s2mps11.h> 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "samsung,exynos7-espresso", "samsung,exynos7"; 26 stdout-path = &serial_2; 34 usb30_vbus_reg: regulator-usb30 { 35 compatible = "regulator-fixed"; 36 regulator-name = "VBUS_5V"; [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6ull-dhcom-drc02.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 6 * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2 7 * DHCOR PCB number: 578-200 or newer 8 * DHCOM PCB number: 579-200 or newer 9 * DRC02 PCB number: 568-100 or newer (2nd ethernet by SoM) 11 /dts-v1/; 13 #include "imx6ull-dhcom-som.dtsi" 14 #include "imx6ull-dhcom-som-cfg-sdcard.dtsi" 18 compatible = "dh,imx6ull-dhcom-drc02", "dh,imx6ull-dhcom-som", 19 "dh,imx6ull-dhcor-som", "fsl,imx6ull"; [all …]
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H A D | imx6ull-dhcom-picoitx.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 6 * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2 7 * DHCOR PCB number: 578-200 or newer 8 * DHCOM PCB number: 579-200 or newer 9 * PicoITX PCB number: 487-600 or newer 11 /dts-v1/; 13 #include "imx6ull-dhcom-som.dtsi" 14 #include "imx6ull-dhcom-som-cfg-sdcard.dtsi" 18 compatible = "dh,imx6ull-dhcom-picoitx", "dh,imx6ull-dhcom-som", 19 "dh,imx6ull-dhcor-som", "fsl,imx6ull"; [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3566-radxa-cm3-io.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/soc/rockchip,vop2.h> 10 #include "rk3566-radxa-cm3.dtsi" 14 compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566"; 22 stdout-path = "serial2:1500000n8"; 25 gmac1_clkin: external-gmac1-clock { 26 compatible = "fixed-clock"; 27 clock-frequency = <125000000>; 28 clock-output-names = "gmac1_clkin"; [all …]
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H A D | rk3368-lion.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 16 stdout-path = "serial0:115200n8"; 19 ext_gmac: gmac-clk { 20 compatible = "fixed-clock"; 21 clock-frequency = <125000000>; 22 clock-output-names = "ext_gmac"; 23 #clock-cells = <0>; 27 compatible = "i2c-mux-gpio"; 28 #address-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip-io-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 24 hooked up to the pins. 42 to report their voltage. The IO Voltage Domain for any non-specified 48 - rockchip,px30-io-voltage-domain 49 - rockchip,px30-pmu-io-voltage-domain 50 - rockchip,rk3188-io-voltage-domain [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | sunplus,sp7021-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Dvorkin Dmitry <dvorkin@tibbo.com> 12 - Wells Lu <wellslutw@gmail.com> 15 The Sunplus SP7021 pin controller is used to control SoC pins. Please 16 refer to pinctrl-bindings.txt in this directory for details of the common 19 SP7021 has 99 digital GPIO pins which are numbered from GPIO 0 to 98. All 20 are multiplexed with some special function pins. SP7021 has 3 types of [all …]
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/linux/arch/arm/boot/dts/sunplus/ |
H A D | sunplus-sp7021.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/sunplus,sp7021-clkc.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/reset/sunplus,sp7021-reset.h> 11 #include <dt-bindings/pinctrl/sppctl-sp7021.h> 12 #include <dt-bindings/gpio/gpio.h> 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <XTAL>; 25 clock-output-names = "extclk"; [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap4-epson-embt2ws.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 5 /dts-v1/; 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/input/input.h> 12 model = "Epson Moverio BT-200"; 20 backlight-left { 21 compatible = "pwm-backlight"; 23 power-supply = <&unknown_supply>; 26 backlight-right { 27 compatible = "pwm-backlight"; [all …]
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