Searched +full:scpi +full:- +full:power +full:- +full:domains (Results 1 – 7 of 7) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | arm,scpi.txt | 1 System Control and Power Interface (SCPI) Message Protocol 2 ---------------------------------------------------------- 4 Firmware implementing the SCPI described in ARM document number ARM DUI 0922B 6 by Linux to initiate various system control and power operations. 10 - compatible : should be 11 * "arm,scpi" : For implementations complying to SCPI v1.0 or above 12 * "arm,scpi-pre-1.0" : For implementations complying to all 13 unversioned releases prior to SCPI v1.0 14 - mboxes: List of phandle and mailbox channel specifiers 16 SCPI message protocol should be specified in any order [all …]
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/freebsd/sys/contrib/device-tree/Bindings/firmware/ |
H A D | arm,scpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/firmware/arm,scpi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: System Control and Power Interface (SCPI) Message Protocol 11 - Sudeep Holla <sudeep.holla@arm.com> 14 Firmware implementing the SCPI described in ARM document number ARM DUI 16 used by Linux to initiate various system control and power operations. 19 the SCPI provide for OSPM in the device tree. 25 const: scpi [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/arm/ |
H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 clock-frequency = <50000000>; 14 #address-cells = <1>; 15 #size-cell [all...] |
H A D | juno-scmi.dtsi | 3 power-domains = <&scmi_devpd 8>; 7 power-domains = <&scmi_devpd 8>; 11 power-domains = <&scmi_devpd 8>; 15 power [all...] |
/freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
H A D | arm,mhu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jassi Brar <jaswinder.singh@linaro.org> 13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3 22 interrupt signal using a 32-bit register, with all 32-bits logically ORed 28 interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote 37 - arm,mhu 38 - arm,mhu-doorbell 40 - compatible [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
H A D | meson-gx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/power/meson-gxbb-power.h> 16 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; 29 reserved-memory { [all …]
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H A D | meson-axg.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/axg-aoclkc.h> 7 #include <dt-bindings/clock/axg-audio-clkc.h> 8 #include <dt-bindings/clock/axg-clk [all...] |