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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,sc7280-lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco
[all...]
H A Dqcom,sc7280-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qco
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 CRD board device tree source
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-id
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H A Dsc7280-crd.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 CRD board device tree source
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform";
15 compatible = "qcom,sc7280-crd", "google,hoglin", "qcom,sc7280";
22 stdout-path = "serial0:115200n8";
27 pmg1110-regulators {
28 compatible = "qcom,pmg1110-rpmh-regulators";
[all …]
H A Dsc7280-herobrine-crd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sc7280 CRD 3+ board device tree source
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
15 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
16 compatible = "google,zoglin", "google,hoglin", "qcom,sc7280";
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
[all …]
H A Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 SoC device tree source
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
[all …]
H A Dsc7280-herobrine-herobrine-r1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-rt5682.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
16 compatible = "google,herobrine", "qcom,sc7280";
59 clock-frequency = <400000>;
64 pinctrl-names = "default";
65 pinctrl-0 = <&tp_int_odl>;
67 interrupt-parent = <&tlmm>;
[all …]
H A Dsc7280-herobrine-audio-rt5682-3mic.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * using rt5682 codec and having 3 dmics connected to sc7280.
11 /* BOARD-SPECIFIC TOP LEVEL NODES */
13 compatible = "google,sc7280-herobrine";
14 model = "sc7280-rt5682-max98360
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H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include "sc7280.dtsi"
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
[all …]
H A Dsc7280-herobrine-audio-wcd9385.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 device tree source for boards using Max98360 and wcd9385 codec
9 /* BOARD-SPECIFIC TOP LEVEL NODES */
11 compatible = "google,sc7280-herobrine";
12 model = "sc7280-wcd938x-max98360a-1mic";
14 audio-routing =
35 #address-cells = <1>;
36 #size-cells = <0>;
38 dai-link@0 {
39 link-name = "MAX98360A";
[all …]
H A Dsc7280-herobrine-audio-rt5682.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /* BOARD-SPECIFIC TOP LEVEL NODES */
13 compatible = "google,sc7280-herobrine";
14 model = "sc7280-rt5682-max98360a-1mic";
16 audio-routing = "Headphone Jack", "HPOL",
19 #address-cells = <1>;
20 #size-cells = <0>;
22 dai-link@0 {
23 link-name = "MAX98360";
27 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
[all …]
H A Dsc7280-herobrine-evoker.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "sc7280-herobrine.dtsi"
9 #include "sc7280-herobrine-audio-rt5682-3mic.dtsi"
25 clock-frequency = <400000>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&tp_int_odl>;
33 interrupt-parent = <&tlmm>;
36 vcc-supply = <&pp3300_z1>;
38 wakeup-source;
44 clock-frequency = <400000>;
[all …]
H A Dsc7280-herobrine-evoker-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
14 compatible = "google,evoker", "qcom,sc7280";
31 clock-frequency = <400000>;
34 compatible = "hid-over-i2c";
36 pinctrl-names = "default";
37 pinctrl-0 = <&tp_int_odl>;
39 interrupt-parent = <&tlmm>;
42 hid-descr-addr = <0x20>;
[all …]
H A Dsc7280-chrome-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sc7280 fragment for devices with Chrome bootloader
20 /delete-node/ &cdsp_mem;
21 /delete-node/ &domain_idle_states;
22 /delete-node/ &gpu_zap_mem;
23 /delete-node/ &gpu_zap_shader;
24 /delete-node/ &hyp_mem;
25 /delete-node/ &xbl_mem;
26 /delete-node/ &reserved_xbl_uefi_log;
27 /delete-node/ &sec_apps_mem;
[all …]
H A Dsc7280-herobrine-zombie.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "sc7280-herobrine.dtsi"
9 #include "sc7280-herobrine-audio-rt5682.dtsi"
24 clock-frequency = <400000>;
28 compatible = "hid-over-i2c";
30 pinctrl-names = "default";
31 pinctrl-0 = <&tp_int_odl>;
33 interrupt-parent = <&tlmm>;
36 hid-descr-addr = <0x01>;
37 vdd-supply = <&pp3300_z1>;
[all …]
H A Dsc7280-herobrine-herobrine-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 #include "sc7280.dtsi"
24 #include "sc7280-chrome-common.dtsi"
[all …]
H A Dsc7280-idp-ec-h1.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 EC/H1 over SPI (common between IDP2 and CRD)
11 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
12 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
15 compatible = "google,cros-ec-spi";
17 interrupt-parent = <&tlmm>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&ap_ec_int_l>;
21 spi-max-frequency = <3000000>;
22 wakeup-source;
[all …]
H A Dsc7280-herobrine-villager.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "sc7280-herobrine.dtsi"
24 clock-frequency = <400000>;
27 compatible = "hid-over-i2c";
29 pinctrl-names = "default";
30 pinctrl-0 = <&tp_int_odl>;
32 interrupt-parent = <&tlmm>;
35 hid-descr-addr = <0x20>;
36 vdd-supply = <&pp3300_z1>;
38 wakeup-source;
[all …]
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sc7280 Qcard device tree source
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 #include "sc7280.dtsi"
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
[all …]
H A Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,sc7280-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7280 PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SC7280 SoC PCIe root complex controller is based on the Synopsys
19 const: qcom,pcie-sc7280
25 reg-names:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dqcom,i2c-cci.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
16 - enum:
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-msm.txt1 * Qualcomm SDHCI controller (sdhci-msm)
4 and the properties used by the sdhci-msm driver.
7 - compatible: Should contain a SoC-specific string and a IP version string:
9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
10 "qcom,sdhci-msm-v5" for sdcc version 5.0
13 string is added to support this change - "qcom,sdhci-msm-v5".
15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
16 "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"
17 "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"
18 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
[all …]
H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
19 - enum:
20 - qcom,sdhci-msm-v4
22 - items:
23 - enum:
[all …]

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