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/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Dqcom,sc7280-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7280
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H A Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
19 - enum:
20 - qcom,sc7180-dp
21 - qcom,sc7280-dp
22 - qcom,sc7280-edp
23 - qcom,sc8180x-dp
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H A Ddpu-sc7280.yaml1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for SC7280
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SC7280.
19 const: qcom,sc7280-mdss
24 reg-names:
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,sc7280-dispcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SC7280
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SC7280.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sc7280.h
20 const: qcom,sc7280-dispcc
24 - description: Board XO source
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7280-herobrine-crd.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sc7280 CRD 3+ board device tree source
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
15 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
16 compatible = "google,zoglin", "google,hoglin", "qcom,sc7280";
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
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H A Dsc7280-herobrine-herobrine-r1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-rt5682.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
16 compatible = "google,herobrine", "qcom,sc7280";
59 clock-frequency = <400000>;
64 pinctrl-names = "default";
65 pinctrl-0 = <&tp_int_odl>;
67 interrupt-parent = <&tlmm>;
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H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sc7280 Qcard device tree source
5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 #include "sc7280.dtsi"
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
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H A Dsc7280-herobrine.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
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H A Dsc7280-herobrine-herobrine-r0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
11 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 #include "sc7280.dtsi"
24 #include "sc7280-chrome-common.dtsi"
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H A Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 SoC device tree source
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
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H A Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,edp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Qualcomm eDP PHY
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
20 - qcom,sc7280-edp-phy
21 - qcom,sc8180x-edp-phy
22 - qcom,sc8280xp-dp-phy
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