| /freebsd/sys/dev/iicbus/pmic/rockchip/ |
| H A D | rk8xx_regulators.c | 113 struct rk8xx_softc *sc1; in rk8xx_regnode_reg_to_voltage() local 115 sc1 = device_get_softc(sc->base_dev); in rk8xx_regnode_reg_to_voltage() 116 if (sc1->type == RK809 || sc1->type == RK817) { in rk8xx_regnode_reg_to_voltage() 153 struct rk8xx_softc *sc1; in rk8xx_regnode_voltage_to_reg() local 155 sc1 = device_get_softc(sc->base_dev); in rk8xx_regnode_voltage_to_reg() 162 if (sc1->type == RK809 || sc1->type == RK817) { in rk8xx_regnode_voltage_to_reg() 203 struct rk8xx_softc *sc1; in rk8xx_regnode_set_voltage() local 206 sc1 = device_get_softc(sc->base_dev); in rk8xx_regnode_set_voltage() 220 if (sc1->type == RK809 || sc1->type == RK817) in rk8xx_regnode_set_voltage()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 868 … // gfx940: bit 0 = sc0, bit 1 = nt, bit 4 = sc1 1102 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1132 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1162 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1194 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1212 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1231 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1249 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1269 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 1288 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1 [all …]
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| /freebsd/share/doc/smm/02.config/ |
| H A D | spell.ok | 239 sc1
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| /freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/cli_root/zpool_split/ |
| H A D | zpool_split_vdevs.ksh | 72 disks[sc]="sc1 sc2"
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMemoryLegalizer.cpp | 488 /// Sets SC1 bit to "true" if present in \p MI. Returns true if \p MI 491 return enableNamedBit(MI, AMDGPU::CPol::SC1); in enableSC1Bit() 1562 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertRelease() 1681 // Set SC1 bit to indicate system scope. in enableRMWCacheBypass() 1688 // RMW atomic operations implicitly bypass the L1 cache and only use SC1 in enableRMWCacheBypass() 1690 // they are return or no-return. Leave SC1 bit unset to indicate agent in enableRMWCacheBypass() 1764 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertAcquire() 1778 .addImm(AMDGPU::CPol::SC1); in insertAcquire() 1851 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertRelease() 1860 .addImm(AMDGPU::CPol::SC1); in insertRelease()
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| H A D | AMDGPU.td | 920 def FeatureForceStoreSC0SC1 : SubtargetFeature<"force-store-sc0-sc1", 923 "Has SC0 and SC1 on stores"
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| H A D | SIDefines.h | 385 SC1 = SCC, enumerator
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | realtek,rtd1319d-pinctrl.yaml | 55 sc1, sc1_data0, sc1_data1, sc1_data2, ao, gspi_loc0, gspi_loc1,
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| H A D | realtek,rtd1619b-pinctrl.yaml | 57 spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1,
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| /freebsd/lib/msun/ld80/ |
| H A D | s_erfl.c | 209 #define sc1 (sc1u.e) macro 325 S=one+s*(sc1+s*(sc2+s*(sc3+s*(sc4+s*sc5)))); in erfcl()
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| /freebsd/lib/msun/ld128/ |
| H A D | s_erfl.c | 179 sc1 = 7.72730753022908298637508998072635696e1L, /* 0x40053517, 0xa10d52bc, 0xdabb55b6, 0xbd0328c… variable 316 S=one+s*(sc1+s*(sc2+s*(sc3+s*(sc4+s*(sc5+s*(sc6+s*(sc7+ in erfcl()
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| /freebsd/lib/libusb/ |
| H A D | libusb20.h | 228 void libusb20_tr_set_priv_sc1(struct libusb20_transfer *xfer, void *sc1);
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| H A D | libusb20.c | 393 libusb20_tr_set_priv_sc1(struct libusb20_transfer *xfer, void *sc1) in libusb20_tr_set_priv_sc1() argument 395 xfer->priv_sc1 = sc1; in libusb20_tr_set_priv_sc1()
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| H A D | libusb20.3 | 87 .Fn libusb20_tr_set_priv_sc1 "struct libusb20_transfer *xfer" "void *sc1"
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| /freebsd/contrib/llvm-project/lld/COFF/ |
| H A D | Writer.cpp | 862 SectionChunk *sc1 = dyn_cast_or_null<SectionChunk>(s); in fixGnuImportChunks() local 864 if (!sc1 || !sc2) { in fixGnuImportChunks() 865 // if SC1, order them ascending. If SC2 or both null, in fixGnuImportChunks() 867 return sc1 != nullptr; in fixGnuImportChunks() 873 (sc1->file->parentName + "/" + sc1->file->getName()).str(); in fixGnuImportChunks()
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| /freebsd/share/doc/usd/21.troff/ |
| H A D | m2 | 329 and may be used in numerical \fIexpressions\fR (\(sc1.4).
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVBuiltins.cpp | 2056 unsigned SC1 = storageClassToAddressSpace(SPIRV::StorageClass::Generic); in getOrCreateSPIRVDeviceEventPointer() local 2057 Type *PtrType = PointerType::get(PointerType::get(OpaqueType, SC0), SC1); in getOrCreateSPIRVDeviceEventPointer()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 204 O << (AMDGPU::isGFX940(STI) ? " sc1" : " scc"); in printCPol()
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| /freebsd/contrib/tcsh/ |
| H A D | complete.tcsh | 122 c@-l@'`\ls -1 /usr/lang/SC1.0/lib*.a | sed s%^.\*/lib%%\;s%\\.a\$%%`'@ \
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| /freebsd/usr.bin/lex/ |
| H A D | lex.1 | 549 <sc1>foo<sc2>bar
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 6517 .Case("sc1", AMDGPU::CPol::SC1) in getCPolKind()
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| /freebsd/crypto/krb5/src/ |
| H A D | configure | 6465 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */ 10495 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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| /freebsd/contrib/bmake/ |
| H A D | configure | 5731 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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| /freebsd/crypto/heimdal/ |
| H A D | configure | 15253 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */ 25536 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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| /freebsd/contrib/ntp/sntp/ |
| H A D | configure | 7605 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */ 7781 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
|