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/freebsd/sys/dev/iicbus/pmic/rockchip/
H A Drk8xx_regulators.c113 struct rk8xx_softc *sc1; in rk8xx_regnode_reg_to_voltage() local
115 sc1 = device_get_softc(sc->base_dev); in rk8xx_regnode_reg_to_voltage()
116 if (sc1->type == RK809 || sc1->type == RK817) { in rk8xx_regnode_reg_to_voltage()
153 struct rk8xx_softc *sc1; in rk8xx_regnode_voltage_to_reg() local
155 sc1 = device_get_softc(sc->base_dev); in rk8xx_regnode_voltage_to_reg()
162 if (sc1->type == RK809 || sc1->type == RK817) { in rk8xx_regnode_voltage_to_reg()
203 struct rk8xx_softc *sc1; in rk8xx_regnode_set_voltage() local
206 sc1 = device_get_softc(sc->base_dev); in rk8xx_regnode_set_voltage()
220 if (sc1->type == RK809 || sc1->type == RK817) in rk8xx_regnode_set_voltage()
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td868 … // gfx940: bit 0 = sc0, bit 1 = nt, bit 4 = sc1
1102 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1132 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1162 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1194 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1212 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1231 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1249 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1269 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
1288 // gfx940: bit 0 = sc0, bit 1 = nt, bit 3 = swz, bit 4 = sc1
[all …]
/freebsd/share/doc/smm/02.config/
H A Dspell.ok239 sc1
/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/cli_root/zpool_split/
H A Dzpool_split_vdevs.ksh72 disks[sc]="sc1 sc2"
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMemoryLegalizer.cpp488 /// Sets SC1 bit to "true" if present in \p MI. Returns true if \p MI
491 return enableNamedBit(MI, AMDGPU::CPol::SC1); in enableSC1Bit()
1562 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertRelease()
1681 // Set SC1 bit to indicate system scope. in enableRMWCacheBypass()
1688 // RMW atomic operations implicitly bypass the L1 cache and only use SC1 in enableRMWCacheBypass()
1690 // they are return or no-return. Leave SC1 bit unset to indicate agent in enableRMWCacheBypass()
1764 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertAcquire()
1778 .addImm(AMDGPU::CPol::SC1); in insertAcquire()
1851 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertRelease()
1860 .addImm(AMDGPU::CPol::SC1); in insertRelease()
H A DAMDGPU.td920 def FeatureForceStoreSC0SC1 : SubtargetFeature<"force-store-sc0-sc1",
923 "Has SC0 and SC1 on stores"
H A DSIDefines.h385 SC1 = SCC, enumerator
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Drealtek,rtd1319d-pinctrl.yaml55 sc1, sc1_data0, sc1_data1, sc1_data2, ao, gspi_loc0, gspi_loc1,
H A Drealtek,rtd1619b-pinctrl.yaml57 spdif_optical_loc1, emmc_spi, emmc, sc1, uart0, uart1, uart2_loc0, uart2_loc1,
/freebsd/lib/msun/ld80/
H A Ds_erfl.c209 #define sc1 (sc1u.e) macro
325 S=one+s*(sc1+s*(sc2+s*(sc3+s*(sc4+s*sc5)))); in erfcl()
/freebsd/lib/msun/ld128/
H A Ds_erfl.c179 sc1 = 7.72730753022908298637508998072635696e1L, /* 0x40053517, 0xa10d52bc, 0xdabb55b6, 0xbd0328c… variable
316 S=one+s*(sc1+s*(sc2+s*(sc3+s*(sc4+s*(sc5+s*(sc6+s*(sc7+ in erfcl()
/freebsd/lib/libusb/
H A Dlibusb20.h228 void libusb20_tr_set_priv_sc1(struct libusb20_transfer *xfer, void *sc1);
H A Dlibusb20.c393 libusb20_tr_set_priv_sc1(struct libusb20_transfer *xfer, void *sc1) in libusb20_tr_set_priv_sc1() argument
395 xfer->priv_sc1 = sc1; in libusb20_tr_set_priv_sc1()
H A Dlibusb20.387 .Fn libusb20_tr_set_priv_sc1 "struct libusb20_transfer *xfer" "void *sc1"
/freebsd/contrib/llvm-project/lld/COFF/
H A DWriter.cpp862 SectionChunk *sc1 = dyn_cast_or_null<SectionChunk>(s); in fixGnuImportChunks() local
864 if (!sc1 || !sc2) { in fixGnuImportChunks()
865 // if SC1, order them ascending. If SC2 or both null, in fixGnuImportChunks()
867 return sc1 != nullptr; in fixGnuImportChunks()
873 (sc1->file->parentName + "/" + sc1->file->getName()).str(); in fixGnuImportChunks()
/freebsd/share/doc/usd/21.troff/
H A Dm2329 and may be used in numerical \fIexpressions\fR (\(sc1.4).
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVBuiltins.cpp2056 unsigned SC1 = storageClassToAddressSpace(SPIRV::StorageClass::Generic); in getOrCreateSPIRVDeviceEventPointer() local
2057 Type *PtrType = PointerType::get(PointerType::get(OpaqueType, SC0), SC1); in getOrCreateSPIRVDeviceEventPointer()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp204 O << (AMDGPU::isGFX940(STI) ? " sc1" : " scc"); in printCPol()
/freebsd/contrib/tcsh/
H A Dcomplete.tcsh122 c@-l@'`\ls -1 /usr/lang/SC1.0/lib*.a | sed s%^.\*/lib%%\;s%\\.a\$%%`'@ \
/freebsd/usr.bin/lex/
H A Dlex.1549 <sc1>foo<sc2>bar
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp6517 .Case("sc1", AMDGPU::CPol::SC1) in getCPolKind()
/freebsd/crypto/krb5/src/
H A Dconfigure6465 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
10495 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
/freebsd/contrib/bmake/
H A Dconfigure5731 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
/freebsd/crypto/heimdal/
H A Dconfigure15253 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
25536 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
/freebsd/contrib/ntp/sntp/
H A Dconfigure7605 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
7781 { /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */

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