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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,saw2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 power-controller that transitions a piece of hardware (like a processor or
27 - enum:
28 - qcom,ipq4019-saw2-cpu
29 - qcom,ipq4019-saw2-l2
30 - qcom,ipq8064-saw2-cpu
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,spmi-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/qcom,spmi-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robert Marko <robimarko@gmail.com>
15 - qcom,pm6125-regulators
16 - qcom,pm660-regulators
17 - qcom,pm660l-regulators
18 - qcom,pm8004-regulators
19 - qcom,pm8005-regulators
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996-xiaomi-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 compatible = "gpio-gate-clock";
17 #clock-cells = <0>;
18 enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&divclk1_default>;
[all …]
H A Dmsm8996-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
14 #include <dt-bindings/sound/qcom,wcd9335.h>
23 compatible = "simple-battery";
25 constant-charge-current-max-microamp = <3000000>;
26 voltage-min-design-microvolt = <3400000>;
30 stdout-path = "serial1:115200n8";
[all …]
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
H A Dapq8096-db820c.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
6 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 #include <dt-bindings/sound/qcom,q6afe.h>
16 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include <dt-bindings/sound/qcom,wcd9335.h>
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
H A Dqcom-msm8226.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
10 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
11 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
12 #include <dt-bindings/clock/qcom,rpmcc.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
[all …]
H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
11 #include <dt-bindings/gpio/gpio.h>
[all …]
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
19 stdout-path = "serial0:115200n8";
23 vph: regulator-fixed {
[all …]
/linux/drivers/tty/serial/jsm/
H A Djsm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
49 dev_dbg(pdev->dev, fmt, ##__VA_ARGS__); \
94 #define JSM_VERSION "jsm: 1.2-1-INKERNEL"
95 #define JSM_PARTNUM "40002438_A-INKERNEL"
122 * Per-board information
126 int boardnum; /* Board number: 0-32 */
178 #define RQUEUEMASK 0x1FFF /* 8 K - 1 */
179 #define EQUEUEMASK 0x1FFF /* 8 K - 1 */
216 u8 *ch_rqueue; /* Our read queue buffer - malloc'ed */
220 u8 *ch_equeue; /* Our error queue buffer - malloc'ed */
[all …]
/linux/drivers/soc/qcom/
H A Dspm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
6 * SAW power controller driver
257 enum spm_reg reg, u32 val) in spm_register_write() argument
259 if (drv->reg_data->reg_offset[reg]) in spm_register_write()
260 writel_relaxed(val, drv->reg_base + in spm_register_write()
261 drv->reg_data->reg_offset[reg]); in spm_register_write()
266 enum spm_reg reg, u32 val) in spm_register_write_sync() argument
270 if (!drv->reg_data->reg_offset[reg]) in spm_register_write_sync()
274 writel_relaxed(val, drv->reg_base + in spm_register_write_sync()
[all …]
/linux/arch/arm/mach-qcom/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
59 node = of_find_compatible_node(NULL, NULL, "qcom,gcc-msm8660"); in scss_release_secondary()
62 return -ENXIO; in scss_release_secondary()
68 return -ENOMEM; in scss_release_secondary()
82 void __iomem *reg; in cortex_a7_release_secondary() local
88 return -ENODEV; in cortex_a7_release_secondary()
92 ret = -ENODEV; in cortex_a7_release_secondary()
96 reg = of_iomap(acc_node, 0); in cortex_a7_release_secondary()
97 if (!reg) { in cortex_a7_release_secondary()
98 ret = -ENOMEM; in cortex_a7_release_secondary()
[all …]
/linux/sound/pci/cs46xx/
H A Dcs46xx_dsp_scb_types.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
32 31 [30-28]27 [26:24] 23 22 21 20 [19:18] [17:16] 15 14 13 12 11 10 9 8 7 6 [5:0]
35 |H|_____ |H|_________|S_|D |__|__|______|_______|___|ne|__ |__ |__|__|_|_|_|_|_Count -1|
39 u32 saw; /* Source Address Word */ member
44 u32 npaw; /* Next-Page Address Word */
48 31-30 29 28 [27:16] [15:12] [11:3] [2:0]
50 |SV |LE|SE| Sample-end byte offset | | Page-map entry offset for next | |
51 |page|__|__| ___________________________|_________|__page, if !sample-end___________|____|
53 u32 npcw; /* Next-Page Control Word */
54 u32 lbaw; /* Loop-Begin Address Word */
[all …]
/linux/drivers/iio/imu/bno055/
H A Dbno055_ser_core.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2021-2022 Istituto Italiano di Tecnologia
33 * +------+------+-----+-----+----- ... ----+
34 * | 0xAA | 0xOO | REG | LEN | payload[LEN] |
35 * +------+------+-----+-----+----- ... ----+
38 * +------+----------+
40 * +------+----------+
45 * sw resets - bno055 on serial bus basically requires the hw reset pin).
48 * +------+------+-----+-----+
49 * | 0xAA | 0xO1 | REG | LEN |
[all …]
/linux/drivers/regulator/
H A Dqcom_spmi-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
8 #include <linux/devm-helpers.h>
57 * struct spmi_regulator_init_data - spmi-regulator initialization data
365 * struct spmi_voltage_range - regulator set point voltage mapping description
380 * (max_uV - min_uV) % step_uV == 0
381 * (set_point_min_uV - min_uV) % step_uV == 0*
382 * (set_point_max_uV - min_uV) % step_uV == 0*
383 * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
478 ((_set_point_max_uV - _set_point_min_uV) / _step_uV) + 1 : \
[all …]
/linux/Documentation/devicetree/bindings/pwm/
H A Drenesas,rzg2l-gpt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
16 * Up-counting or down-counting (saw waves) or up/down-counting
36 short-circuits between output pins.
42 pwm0 - GPT32E0.GTIOC0A channel
43 pwm1 - GPT32E0.GTIOC0B channel
[all …]
/linux/drivers/pwm/
H A Dpwm-rzg2l-gpt.c1 // SPDX-License-Identifier: GPL-2.0
8 …* https://www.renesas.com/eu/en/document/mah/rzg2l-group-rzg2lc-group-users-manual-hardware-0?lang…
11 * - Counter must be stopped before modifying Mode and Prescaler.
12 * - When PWM is disabled, the output is driven to inactive.
13 * - While the hardware supports both polarities, the driver (for now)
15 * - General PWM Timer (GPT) has 8 HW channels for PWM operations and
17 * - Each IO is modelled as an independent PWM channel.
18 * - When both channels are used, disabling the channel on one stops the
20 * - When both channels are used, the period of both IOs in the HW channel
99 static void rzg2l_gpt_write(struct rzg2l_gpt_chip *rzg2l_gpt, u32 reg, u32 data) in rzg2l_gpt_write() argument
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmmhub_v1_0.c48 adev->gmc.fb_start = base; in mmhub_v1_0_get_fb_location()
49 adev->gmc.fb_end = top; in mmhub_v1_0_get_fb_location()
57 struct amdgpu_vmhub *hub = &adev->vmhub[AMDGPU_MMHUB0(0)]; in mmhub_v1_0_setup_vm_pt_regs()
60 hub->ctx_addr_distance * vmid, in mmhub_v1_0_setup_vm_pt_regs()
64 hub->ctx_addr_distance * vmid, in mmhub_v1_0_setup_vm_pt_regs()
70 uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo); in mmhub_v1_0_init_gart_aperture_regs()
75 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v1_0_init_gart_aperture_regs()
77 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v1_0_init_gart_aperture_regs()
80 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v1_0_init_gart_aperture_regs()
82 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v1_0_init_gart_aperture_regs()
[all …]
/linux/drivers/media/dvb-frontends/
H A Dsp887x.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
42 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len }; in i2c_writebytes()
45 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { in i2c_writebytes()
47 __func__, state->config->demod_address, err); in i2c_writebytes()
48 return -EREMOTEIO; in i2c_writebytes()
54 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data) in sp887x_writereg() argument
56 u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff }; in sp887x_writereg()
57 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 }; in sp887x_writereg()
60 if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) { in sp887x_writereg()
[all …]
H A Ddrxk_hard.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drxk_hard: DRX-K DVB-C/T demodulator driver
5 * Copyright (C) 2010-2011 Digital Devices GmbH
45 return state->m_operation_mode == OM_DVBT; in is_dvbt()
50 return state->m_operation_mode == OM_QAM_ITU_A || in is_qam()
51 state->m_operation_mode == OM_QAM_ITU_B || in is_qam()
52 state->m_operation_mode == OM_QAM_ITU_C; in is_qam()
164 R0 = (a % c) << 4; /* 32-28 == 4 shifts possible at max */ in Frac28a()
193 i2c_lock_bus(state->i2c, I2C_LOCK_SEGMENT); in drxk_i2c_lock()
194 state->drxk_i2c_exclusive_lock = true; in drxk_i2c_lock()
[all …]
/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
159 * serves double-duty of keeping track of the direction and
165 * each other's read-modify-write.
225 unsigned int reg, u16 *val) in ti_sn65dsi86_read_u16() argument
[all …]
/linux/drivers/net/ethernet/arc/
H A Demac_main.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
29 * arc_emac_tx_avail - Return the number of available slots in the tx ring.
36 return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM; in arc_emac_tx_avail()
40 * arc_emac_adjust_link - Adjust the PHY link duplex.
49 struct phy_device *phy_dev = ndev->phydev; in arc_emac_adjust_link()
50 unsigned int reg, state_changed = 0; in arc_emac_adjust_link() local
52 if (priv->link != phy_dev->link) { in arc_emac_adjust_link()
53 priv->link = phy_dev->link; in arc_emac_adjust_link()
57 if (priv->speed != phy_dev->speed) { in arc_emac_adjust_link()
[all …]
/linux/sound/soc/codecs/
H A Drt5514.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5514.c -- RT5514 ALSA SoC audio codec driver
24 #include <sound/soc-dapm.h>
31 #include "rt5514-spi.h"
120 regmap_write(rt5514->i2c_regmap, 0x18002000, 0x000010ec); in rt5514_enable_dsp_prepare()
122 regmap_write(rt5514->i2c_regmap, 0x18002200, 0x00028604); in rt5514_enable_dsp_prepare()
124 regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000001); in rt5514_enable_dsp_prepare()
125 /* mini-core reset */ in rt5514_enable_dsp_prepare()
126 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x0005514b); in rt5514_enable_dsp_prepare()
127 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x00055149); in rt5514_enable_dsp_prepare()
[all …]
/linux/drivers/block/
H A Dswim3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <linux/blk-mq.h>
56 #define REG(x) unsigned char x; char x ## _pad[15]; macro
63 REG(data);
64 REG(timer); /* counts down at 1MHz */
65 REG(error);
66 REG(mode);
67 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
68 REG(setup);
69 REG(control); /* writing bits clears them */
[all …]

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