| /linux/arch/x86/kvm/svm/ |
| H A D | nested.c | 97 kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, svm->vmcb01.ptr->save.cr4, in nested_svm_init_mmu_context()
98 svm->vmcb01.ptr->save.efer, in nested_svm_init_mmu_context()
156 if (!(svm->vmcb01.ptr->save.rflags & X86_EFLAGS_IF)) in recalc_intercepts()
356 struct vmcb_save_area_cached *save) in __nested_vmcb_check_save() argument
358 if (CC(!(save->efer & EFER_SVME))) in __nested_vmcb_check_save()
361 if (CC((save->cr0 & X86_CR0_CD) == 0 && (save->cr0 & X86_CR0_NW)) || in __nested_vmcb_check_save()
362 CC(save->cr0 & ~0xffffffffULL)) in __nested_vmcb_check_save()
365 if (CC(!kvm_dr6_valid(save->dr6)) || CC(!kvm_dr7_valid(save->dr7))) in __nested_vmcb_check_save()
373 if ((save->efer & EFER_LME) && (save->cr0 & X86_CR0_PG)) { in __nested_vmcb_check_save()
374 if (CC(!(save->cr4 & X86_CR4_PAE)) || in __nested_vmcb_check_save()
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| H A D | svm.c | 142 /* enable/disable Next RIP Save */
248 svm->vmcb->save.efer = efer | EFER_SVME; in svm_set_efer()
294 old_rflags = svm->vmcb->save.rflags; in __svm_skip_emulated_instruction()
300 svm->vmcb->save.rflags = old_rflags; in __svm_skip_emulated_instruction()
340 * Save the injection information, even when using next_rip, as the in svm_update_soft_interrupt_rip()
349 svm->soft_int_csbase = svm->vmcb->save.cs.base; in svm_update_soft_interrupt_rip()
651 * save it. in msr_write_intercepted()
655 * save it. in msr_write_intercepted()
800 to_vmcb->save.dbgctl = from_vmcb->save.dbgctl; in svm_copy_lbrs()
801 to_vmcb->save.br_from = from_vmcb->save.br_from; in svm_copy_lbrs()
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| /linux/drivers/pci/ |
| H A D | vc.c | 20 * pci_vc_save_restore_dwords - Save or restore a series of dwords
23 * @buf: buffer to save to or restore from
24 * @dwords: number of dwords to save/restore
25 * @save: whether to save or restore
28 u32 *buf, int dwords, bool save) in pci_vc_save_restore_dwords() argument
33 if (save) in pci_vc_save_restore_dwords()
172 * pci_vc_do_save_buffer - Size, save, or restore VC state
175 * @save_state: buffer for save/restore
176 * @save: if provided a buffer, this indicates what to do with it
178 * Walking Virtual Channel config space to size, save, or restore it
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| /linux/arch/powerpc/platforms/cell/spufs/ |
| H A D | spu_save.c | 7 * SPU-side context save sequence outlined in
29 /* Save, Step 2: in save_event_mask()
30 * Read the SPU_RdEventMsk channel and save to the LSCSA. in save_event_mask()
40 /* Save, Step 3: in save_tag_mask()
41 * Read the SPU_RdTagMsk channel and save to the LSCSA. in save_tag_mask()
55 /* Save, Step 7: in save_upper_240kb()
72 /* Save, Step 9: in save_fpcr()
74 * read instruction, and save to the LSCSA. in save_fpcr()
84 /* Save, Step 10: in save_decr()
85 * Read and save the SPU_RdDec channel data to in save_decr()
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| H A D | switch.c | 17 * save, and then later (optionally) restore the context of a
66 /* Save, Step 1: in acquire_spu_lock()
86 /* Save, Step 2: in check_spu_isolate()
87 * Save, Step 6: in check_spu_isolate()
99 /* Save, Step 3: in disable_interrupts()
101 * Save INT_Mask_class0 in CSA. in disable_interrupts()
103 * Save INT_Mask_class1 in CSA. in disable_interrupts()
105 * Save INT_Mask_class2 in CSA. in disable_interrupts()
136 /* Save, Step 4: in set_watchdog_timer()
139 * maximum allowable time for a context save sequence. in set_watchdog_timer()
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| H A D | spu_save_crt0.S | 3 * crt0_s.S: Entry function for SPU-side context save.
7 * Entry function for SPU-side of the context save sequence.
23 /* SPU Context Save Step 1: Save the first 16 GPRs. */
41 /* SPU Context Save, Step 8: Save the remaining 112 GPRs. */
67 * This is needed so that main has a place to save the
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| H A D | spu_utils.h | 58 /* Save, Step 4: in set_event_mask()
70 /* Save, Step 5: in set_tag_mask()
83 /* Save, Step 6: in build_dma_list()
104 /* Save, Step 12: in enqueue_putllc()
122 /* Save, Step 15: in set_tag_update()
131 /* Save, Step 16: in read_tag_status()
140 /* Save, Step 17: in read_llar_status()
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| /linux/drivers/pinctrl/samsung/ |
| H A D | pinctrl-exynos.c | 883 struct exynos_eint_gpio_save *save = bank->soc_priv; in exynos_pinctrl_suspend() local
887 save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET in exynos_pinctrl_suspend()
889 save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET in exynos_pinctrl_suspend()
891 save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET in exynos_pinctrl_suspend()
893 save->eint_mask = readl(regs + bank->irq_chip->eint_mask in exynos_pinctrl_suspend()
896 pr_debug("%s: save con %#010x\n", in exynos_pinctrl_suspend()
897 bank->name, save->eint_con); in exynos_pinctrl_suspend()
898 pr_debug("%s: save fltcon0 %#010x\n", in exynos_pinctrl_suspend()
899 bank->name, save->eint_fltcon0); in exynos_pinctrl_suspend()
900 pr_debug("%s: save fltcon1 %#010x\n", in exynos_pinctrl_suspend()
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| /linux/arch/arm/mach-sa1100/ |
| H A D | pm.c | 15 * Save more value for the resume function! Support
22 * 2002-05-27: Nicolas Pitre Killed sleep.h and the kmalloced save array.
40 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x macro
63 /* save vital registers */ in sa11x0_pm_enter()
64 SAVE(GPDR); in sa11x0_pm_enter()
65 SAVE(GAFR); in sa11x0_pm_enter()
67 SAVE(PPDR); in sa11x0_pm_enter()
68 SAVE(PPSR); in sa11x0_pm_enter()
69 SAVE(PPAR); in sa11x0_pm_enter()
70 SAVE(PSDR); in sa11x0_pm_enter()
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| /linux/arch/sparc/kernel/ |
| H A D | wuf.S | 60 * T == the trap itself has save'd us into this
113 save %g0, %g0, %g0
114 save %g0, %g0, %g0
144 /* Place a pt_regs frame on the kernel stack, save back
157 /* Save current in a global while we change windows. */
160 save %g0, %g0, %g0
165 mov %fp, %g4 /* Save bogus frame pointer. */
167 save %g0, %g0, %g0
182 /* Fix users window mask and buffer save count. */
205 save %g0, %g0, %g0 /* Save to window 'O' */
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| H A D | wof.S | 38 #define saved_g5 l5 /* Global save register T */
39 #define saved_g6 l6 /* Global save register T */
76 mov %g5, %saved_g5 ! save away global temp register
77 mov %g6, %saved_g6 ! save away 'current' ptr register
79 /* Compute what the new %wim will be if we save the
97 save %g0, %g0, %g0 ! Go where saving will occur
105 /* Save into the window which must be saved and do it.
110 save %g0, %g0, %g0 ! save into the window to stash away
138 * need to save into the appropriate window without inducing
144 save %g0, %g0, %g0 ! Go to where the saving will occur
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| /linux/arch/x86/kernel/ |
| H A D | ftrace_64.S | 20 /* Save parent and function stack frames (rip and rbp) */
23 /* No need to save a stack frame */
27 /* Size of stack used to save mcount regs in save_mcount_regs */
58 /* Save the original rbp */
63 * is not set up properly. If fentry is used, we need to save a frame
69 /* Save the parent pointer (skip orig rbp and our return address) */
73 /* Save the return address (now skip orig rbp, rbp and parent) */
80 * We add enough stack to save all regs.
92 * Save the original RBP. Even though the mcount ABI does not
117 .macro restore_mcount_regs save=0 argument
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| /linux/arch/powerpc/lib/ |
| H A D | test_emulate_step_exec_instr.S | 32 * Save non-volatile GPRs on stack. This includes TOC pointer (GPR2)
44 * Save LR on stack to ensure that the return address is available
51 * Save CR on stack. For simplicity, the entire register is saved
92 * save it to pt_regs.
97 /* Save resulting GPR state to pt_regs */
104 /* Save resulting LR to pt_regs */
108 /* Save resulting CR to pt_regs */
112 /* Save resulting XER to pt_regs */
116 /* Restore resulting GPR3 from scratch space and save it to pt_regs */
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| /linux/arch/microblaze/kernel/ |
| H A D | entry.S | 165 /* turn on virtual protected mode save */
172 /* turn off virtual protected mode save and user mode save*/
180 swi r2, r1, PT_R2; /* Save SDA */ \
189 swi r11, r1, PT_R11; /* save clobbered regs after rval */\
191 swi r13, r1, PT_R13; /* Save SDA2 */ \
193 swi r15, r1, PT_R15; /* Save LP */ \
196 swi r18, r1, PT_R18; /* Save asm scratch reg */ \
209 swi r31, r1, PT_R31; /* Save current task reg */ \
210 mfs r11, rmsr; /* save MSR */ \
258 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \
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| /linux/arch/powerpc/kernel/trace/ |
| H A D | ftrace_entry.S | 32 * Our job is to save the register state into a struct pt_regs (on the stack)
63 /* Save the previous LR in pt_regs->link */
65 /* Also save it in A's stack frame */
68 /* Save all gprs to pt_regs */
88 /* Save previous stack pointer (r1) */
93 /* Load special regs for save below */
104 /* Save callee's TOC in the ABI compliant location */
124 /* Save special regs */
139 /* Save our real return address in nvr for return */
166 /* Save NIP as pt_regs->nip */
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| /linux/arch/sh/kernel/cpu/shmobile/ |
| H A D | sleep.S | 30 /* save mode flags */
33 /* save original vbr */
40 /* save return address */
44 /* save sr */
48 /* save general purpose registers to stack if needed */
62 /* make sure bank0 is selected, save low registers */
71 /* switch to bank 1, save low registers */
87 /* save sp, also set to internal ram */
91 /* save stbcr */
95 /* save mmu and cache context if needed */
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx8.asm | 68 /* Save */
93 var s_save_trapsts = ttmp5 //not really used until the end of the SAVE routine
157 …h L_SKIP_RESTORE //NOT restore. might be a regular trap or save
164 …s_getreg_b32 s_save_status, hwreg(HW_REG_STATUS) //save STATUS sinc…
165 … s_save_status, s_save_status, SQ_WAVE_STATUS_SPI_PRIO_MASK //check whether this is for save
167 … s_save_trapsts, s_save_trapsts, SQ_WAVE_TRAPSTS_SAVECTX_MASK //check whether this is for save
168 s_cbranch_scc1 L_SAVE //this is the operation for save
194 /* save routine */
201 …s_mov_b32 s_save_xnack_mask_lo, xnack_mask_lo //save XNA…
202 …s_mov_b32 s_save_xnack_mask_hi, xnack_mask_hi //save XNACK must before any memory opera…
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| H A D | cwsr_trap_handler_gfx10.asm | 210 s_branch L_SKIP_RESTORE //NOT restore. might be a regular trap or save
216 s_getreg_b32 s_save_status, hwreg(S_STATUS_HWREG) //save STATUS since we will change SCC
218 // Clear SPI_PRIO: do not save with elevated priority.
288 // Prioritize single step exception over context save.
345 // If the PC points to S_ENDPGM then context save will fail if STATUS.HALT is set.
373 // It has no remaining program to run and cannot save without VGPRs.
389 s_mov_b32 s_save_exec_lo, exec_lo //save EXEC and use EXEC for the go signal from SPI
410 // Save first_wave flag so we can clear high bits of save address.
423 // There is no ttmp space to hold the resource constant for VGPR save.
424 // Save v0 by itself since it requires only two SGPRs.
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| H A D | cwsr_trap_handler_gfx12.asm | 157 s_branch L_SKIP_RESTORE //NOT restore. might be a regular trap or save
163 …s_getreg_b32 s_save_state_priv, hwreg(HW_REG_WAVE_STATE_PRIV) //save STATUS since we will change S…
165 // Clear SPI_PRIO: do not save with elevated priority.
219 // Prioritize single step exception over context save.
268 // If the PC points to S_ENDPGM then context save will fail if STATE_PRIV.HALT is set.
297 // It has no remaining program to run and cannot save without VGPRs.
309 s_mov_b32 s_save_exec_lo, exec_lo //save EXEC and use EXEC for the go signal from SPI
316 // Save first_wave flag so we can clear high bits of save address.
322 // There is no ttmp space to hold the resource constant for VGPR save.
323 // Save v0 by itself since it requires only two SGPRs.
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| /linux/arch/arm/common/ |
| H A D | sa1111.c | 967 struct sa1111_save_data *save; in sa1111_suspend_noirq() local
972 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); in sa1111_suspend_noirq()
973 if (!save) in sa1111_suspend_noirq()
975 sachip->saved_state = save; in sa1111_suspend_noirq()
980 * Save state. in sa1111_suspend_noirq()
983 save->skcr = readl_relaxed(base + SA1111_SKCR); in sa1111_suspend_noirq()
984 save->skpcr = readl_relaxed(base + SA1111_SKPCR); in sa1111_suspend_noirq()
985 save->skcdr = readl_relaxed(base + SA1111_SKCDR); in sa1111_suspend_noirq()
986 save->skaud = readl_relaxed(base + SA1111_SKAUD); in sa1111_suspend_noirq()
987 save->skpwm0 = readl_relaxed(base + SA1111_SKPWM0); in sa1111_suspend_noirq()
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| /linux/arch/sh/kernel/cpu/sh3/ |
| H A D | swsusp.S | 90 ! - save registers in swsusp_arch_regs_cpu0
94 sts pr, r0 ! save pr in r0
95 mov r15, r2 ! save sp in r2
96 mov r8, r5 ! save r8 in r5
98 ldc r1, ssr ! save sr in ssr
103 add r3, r15 ! save from top of structure
109 jsr @r1 ! switch to bank1 and save bank1 r7->r0
116 jsr @k1 ! switch to bank0 and save all regs
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| /linux/arch/powerpc/kvm/ |
| H A D | tm.S | 20 * Save transactional state and TM-related registers.
54 /* Save CR on the stack - even if r5 == 0 we need to get cr7 back. */
58 /* Save DSCR so we can restore it to avoid running with user value */
64 * registers. Save the non-volatile registers on the stack if
98 /* Save away PPR soon so we don't run with user value. */
115 /* Save all but r0-r2, r9 & r13 */
123 /* ... now save r13 */
126 /* ... and save r9 */
140 /* Save away checkpointed SPRs. */
153 /* Save FP/VSX. */
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| /linux/arch/loongarch/include/asm/ |
| H A D | lbt.h | 74 static inline void lose_lbt_inatomic(int save, struct task_struct *tsk) in lose_lbt_inatomic() argument
77 if (save) in lose_lbt_inatomic()
86 static inline void lose_lbt(int save) in lose_lbt() argument
89 lose_lbt_inatomic(save, current); in lose_lbt()
100 static inline void lose_lbt_inatomic(int save, struct task_struct *tsk) {} in lose_lbt_inatomic() argument
102 static inline void lose_lbt(int save) {} in lose_lbt() argument
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| /linux/arch/arm/mach-s3c/ |
| H A D | pm-common.h | 16 /* sleep save info */
19 * struct sleep_save - save information for shared peripherals.
20 * @reg: Pointer to the register to save.
24 * other subsystem to save and restore register values over suspend.
34 /* helper functions to save/restore lists of registers. */
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| /linux/arch/arm/kernel/ |
| H A D | iwmmxt.S | 85 add r0, r10, #TI_IWMMXT_STATE @ get task Concan save area
101 beq concan_load @ no owner, skip save
181 * Back up Concan regs to save area and disable access to them
196 add r2, r0, #TI_IWMMXT_STATE @ get task Concan save area
243 add r2, r0, #TI_IWMMXT_STATE @ get task Concan save area
248 @ current Concan values are in the task save area
257 mov r2, #3 @ save all regs
281 add r2, r0, #TI_IWMMXT_STATE @ get task Concan save area
287 @ this task doesn't own Concan regs -- use its save area
318 add r3, r0, #TI_IWMMXT_STATE @ get next task Concan save area
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