Searched +full:sac +full:- +full:mode (Results 1 – 8 of 8) sorted by relevance
| /linux/arch/mips/pci/ |
| H A D | pci-octeon.c | 6 * Copyright (C) 2005-2009 Cavium Networks 20 #include <asm/octeon/cvmx-npi-defs.h> 21 #include <asm/octeon/cvmx-pci-defs.h> 22 #include <asm/octeon/pci-octeon.h> 108 if (dev->subordinate) { in pcibios_plat_dev_init() 119 config |= PCI_EXP_DEVCTL_NFERE; /* Non-Fatal Error Reporting */ in pcibios_plat_dev_init() 133 /* Uncorrectable Error Mask - turned on bits disable errors */ in pcibios_plat_dev_init() 140 /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */ in pcibios_plat_dev_init() 145 /* Correctable Error Mask - turned on bits disable errors */ in pcibios_plat_dev_init() 156 /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */ in pcibios_plat_dev_init() [all …]
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| /linux/arch/arm/include/asm/hardware/ |
| H A D | sa1111.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 7 * This file contains definitions for the SA-1111 Companion Chip. 8 * (Structure and naming borrowed from SA-1101.h, by Peter Danielsson.) 10 * Macro that calculates real address for registers in the SA-1111 17 * Don't ask the (SAC) DMA engines to move less than this amount. 50 * - The October 1999 errata (278260-007) says its bit 13, 1 to enable. 51 * - The Feb 2001 errata (278260-010) says that the previous errata 52 * (278260-009) is wrong, and its bit actually 12, fixed in spec 53 * 278242-003. 54 * - The SA1111 manual (278242) says bit 12, but 0 to enable. [all …]
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| /linux/arch/arm/common/ |
| H A D | sa1111.c | 1 // SPDX-License-Identifier: GPL-2.0-only 25 #include <linux/dma-map-ops.h> 30 #include <asm/mach-types.h> 107 int irq_base; /* base for cascaded on-chip IRQs */ 199 return irq_create_mapping(sachip->irqdomain, hwirq); in sa1111_map_irq() 212 void __iomem *mapbase = sachip->base + SA1111_INTC; in sa1111_irq_handler() 219 desc->irq_data.chip->irq_ack(&desc->irq_data); in sa1111_irq_handler() 228 irqdomain = sachip->irqdomain; in sa1111_irq_handler() 238 /* For level-based interrupts */ in sa1111_irq_handler() 239 desc->irq_data.chip->irq_unmask(&desc->irq_data); in sa1111_irq_handler() [all …]
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| /linux/net/6lowpan/ |
| H A D | iphc.c | 96 * second bit-flip (Universe/Local) is done according RFC2464 99 ((((a)->s6_addr[8]) == (((m)[0]) ^ 0x02)) && \ 100 (((a)->s6_addr[9]) == (m)[1]) && \ 101 (((a)->s6_addr[10]) == (m)[2]) && \ 102 (((a)->s6_addr[11]) == (m)[3]) && \ 103 (((a)->s6_addr[12]) == (m)[4]) && \ 104 (((a)->s6_addr[13]) == (m)[5]) && \ 105 (((a)->s6_addr[14]) == (m)[6]) && \ 106 (((a)->s6_addr[15]) == (m)[7])) 112 ((((a)->s6_addr16[4]) == 0) && \ [all …]
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| /linux/crypto/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 156 cbc(aes), and the support for the crypto self-tests. 178 bool "Enable cryptographic self-tests" 181 Enable the cryptographic self-tests. 183 The cryptographic self-tests run at boot time, or at algorithm 188 - Development and pre-release testing. In this case, also enable 192 - Production kernels, to help prevent buggy drivers from being used 193 and/or meet FIPS 140-3 pre-operational testing requirements. In 197 bool "Enable the full set of cryptographic self-tests" 200 Enable the full set of cryptographic self-tests for each algorithm. [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | qcm6490-fairphone-fp5.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> 13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 17 #include <dt-bindings/sound/qcom,q6asm.h> 18 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> 25 /delete-node/ &rmtfs_mem; [all …]
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| /linux/drivers/misc/genwqe/ |
| H A D | card_base.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com> 26 #include <linux/dma-mapping.h> 37 MODULE_AUTHOR("Joerg-Stephan Vogt <jsvogt@de.ibm.com>"); 59 /* Initial SR-IOV bring-up image */ 108 * genwqe_devnode() - Set default access mode for genwqe devices. 110 * @mode: Carrier to pass-back given mode (permissions) 112 * Default mode should be rw for everybody. Do not change default 115 static char *genwqe_devnode(const struct device *dev, umode_t *mode) in genwqe_devnode() argument 117 if (mode) in genwqe_devnode() [all …]
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| /linux/drivers/iommu/ |
| H A D | dma-iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * A fairly generic DMA-API to IOMMU-API glue layer. 5 * Copyright (C) 2014-2015 ARM Ltd. 7 * based in part on arch/arm/mm/dma-mapping.c: 8 * Copyright (C) 2000-2004 Russell King 15 #include <linux/dma-direct.h> 16 #include <linux/dma-map-ops.h> 20 #include <linux/iommu-dma.h> 30 #include <linux/pci-p2pdma.h> 37 #include "dma-iommu.h" [all …]
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