| /freebsd/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | s3c6410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's S3C6410 SoC device tree source 7 * Samsung's S3C6410 SoC device nodes are listed in this file. S3C6410 12 * S3C6410 SoC. As device tree coverage for S3C6410 increases, additional 19 compatible = "samsung,s3c6410"; 27 valid-mask = <0xffffff7f>; 28 valid-wakeup-mask = <0x00200004>; 32 valid-mask = <0xffffffff>; 33 valid-wakeup-mask = <0x53020000>; 37 clocks: clock-controller@7e00f000 { [all …]
|
| H A D | s3c6410-smdk6410.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung S3C6410 based SMDK6410 board device tree source. 8 * Samsung's S3C6410 SoC. 11 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 16 #include "s3c6410.dtsi" 19 model = "Samsung SMDK6410 board based on S3C6410"; 20 compatible = "samsung,smdk6410", "samsung,s3c6410"; 31 fin_pll: oscillator-0 { [all …]
|
| H A D | s3c6410-mini6410.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's S3C6410 based Mini6410 board device tree source 8 * Samsung's S3C6410 SoC. 11 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 16 #include "s3c6410 [all...] |
| H A D | s3c64xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/clock/samsung,s3c64xx-clock.h> 19 #address-cells = <1>; 20 #size-cells = <1>; 32 #address-cells = <1>; 33 #size-cells = <0>; 37 compatible = "arm,arm1176jzf-s"; 43 compatible = "simple-bus"; 44 #address-cells = <1>; 45 #size-cells = <1>; [all …]
|
| H A D | s5pv210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 19 #include <dt-bindings/clock/s5pv210.h> 20 #include <dt-bindings/clock/s5pv210-audss.h> 23 #address-cells = <1>; 24 #size-cells = <1>; 45 #address-cells = <1>; 46 #size-cells = <0>; 50 compatible = "arm,cortex-a8"; 55 xxti: oscillator-0 { [all …]
|
| H A D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 19 #include <dt-bindings/clock/exynos4.h> 20 #include <dt-bindings/clock/exynos-audss-clk.h> 21 #include <dt-bindings/interrupt-controller/arm-gic.h> 22 #include <dt-bindings/interrupt-controller/irq.h> 25 interrupt-parent = <&gic>; 26 #address-cells = <1>; 27 #size-cells = <1>; [all …]
|
| H A D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include "exynos4-cpu-thermal.dtsi" 18 #include <dt-bindings/clock/exynos3250.h> 19 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 #include <dt-bindings/interrupt-controller/irq.h> 24 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <1>; 46 bus_dmc: bus-dmc { 47 compatible = "samsung,exynos-bus"; [all …]
|
| H A D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 20 #include "exynos4-cpu-thermal.dtsi" 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bus"; 33 clocks = <&clock CLK_DIV_AC 304 clock: clock-controller@10030000 { global() label [all...] |
| H A D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 46 #address-cells = <1>; 47 #size-cells = <0>; 49 cpu-map { 62 compatible = "arm,cortex-a15"; 64 clocks = <&clock CLK_ARM_CLK>; 65 clock-names = "cpu"; [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | s3c-rtc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/rtc/s3c-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S3C, S5P and Exynos Real Time Clock controller 10 - Krzyszto [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | samsung,s3c64xx-clock.txt | 1 * Samsung S3C64xx Clock Controller 3 The S3C64xx clock controller generates and supplies clock to various controllers 4 within the SoC. The clock binding described here is applicable to all SoCs in 9 - compatible: should be one of the following. 10 - "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC. 11 - "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC. 13 - reg: physical base address of the controller and length of memory mapped 16 - #clock-cells: should be 1. 18 Each clock is assigned an identifier and client nodes can use this identifier 19 to specify the clock which they consume. Some of the clocks are available only [all …]
|
| H A D | samsung,s3c6400-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,s3c6400-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S3C6400 SoC clock controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 14 that they are defined using standard clock bindings with following 15 clock-output-names and/or provided as clock inputs to this clock controller: 16 - "fin_pll" - PLL input clock (xtal/extclk) - required, 17 - "xusbxti" - USB xtal - required, [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | samsung,s3c6410-sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jaehoon Chung <jh80.chung@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 16 - samsung,s3c6410-sdhci 17 - samsung,exynos4210-sdhci 26 clock-names: 29 - const: hsmmc [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
| H A D | samsung-wdt.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/watchdog/samsung-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 20 - enu [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-samsung.txt | 8 - compatible: should be one of the following. 9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms 10 - samsung,s3c6410-spi: for s3c6410 platforms 11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms 12 - samsung,exynos5433-spi: for exynos5433 compatible controllers 13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED> 15 - reg: physical base address of the controller and length of memory mapped 18 - interrupts: The interrupt number to the cpu. The interrupt specifier format 21 - dmas : Two or more DMA channel specifiers following the convention outlined 24 - dma-names: Names for the dma channels. There must be at least one channel [all …]
|
| H A D | samsung,spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 19 - enum: 20 - google,gs101-spi 21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450 22 - samsung,s3c6410-spi 23 - samsung,s5pv210-spi # for S5PV210 and S5PC110 24 - samsung,exynos4210-spi [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | samsung,s3c6410-keypad.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/input/samsung,s3c6410-keypad.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 Samsung SoC Keypad controller is used to interface a SoC with a matrix-type 13 The keypad controller can sense a key-press and key-release and report the 17 - Krzysztof Kozlowski <krzk@kernel.org> 22 - samsung,s3c6410-keypad 23 - samsung,s5pv210-keypad 31 clock-names: [all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylweste [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | samsung,exynos-adc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/samsung,exynos-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - enu [all...] |
| /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | samsung,s3c64xx-clock.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 5 * Device Tree binding constants for Samsung S3C64xx clock controller. 12 * Let each exported clock get a unique index, which is used on DT-enabled 13 * platforms to lookup the clock from a clock specifier. These indices are 15 * that new clocks should be added either in free spaces between clock groups 123 /* MEM0 bus clocks - S3C6410-specific. */
|
| /freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
| H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 interrupt-paren [all...] |
| H A D | exynos850.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/exynos850.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/samsung,exynos-usi.h> 20 #address-cells = <2>; 21 #size-cells = <1>; 23 interrupt-parent = <&gic>; 34 arm-pmu { 35 compatible = "arm,cortex-a55-pmu"; 44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, [all …]
|