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/linux/Documentation/devicetree/bindings/rtc/
H A Dnxp,s32g-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/nxp,s32g-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP S32G2/S32G3 Real Time Clock (RTC)
10 - Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
11 - Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
14 RTC hardware module present on S32G2/S32G3 SoCs is used as a wakeup source.
15 It is not kept alive during system reset and it is not battery-powered.
18 - $ref: rtc.yaml#
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/linux/drivers/rtc/
H A Drtc-s32g.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/rtc.h>
33 * S32G2 and S32G3 SoCs have RTC clock source1 reserved and
39 * S32G RTC module has a 512 value and a 32 value hardware frequency
41 * counter ranges by lowering the RTC frequency.
84 status = readl(priv->rtc_base + RTCS_OFFSET); in s32g_rtc_handler()
87 writel(0x0, priv->rtc_base + APIVAL_OFFSET); in s32g_rtc_handler()
88 writel(status | RTCS_APIF, priv->rtc_base + RTCS_OFFSET); in s32g_rtc_handler()
91 rtc_update_irq(priv->rdev, 1, RTC_IRQF | RTC_AF); in s32g_rtc_handler()
97 * The function is not really getting time from the RTC since the S32G RTC
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
50 sleep states. Do not specify an RTC here unless it stays powered
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/linux/drivers/clocksource/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
198 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
221 32-bit free running decrementing counters.
256 bool "Integrator-AP timer driver" if COMPILE_TEST
259 Enables support for the Integrator-AP timer.
284 available on many OMAP-like platforms.
303 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
307 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
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