Home
last modified time | relevance | path

Searched +full:s32g2 +full:- +full:rtc (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dnxp,s32g-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/nxp,s32g-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP S32G2/S32G3 Real Time Clock (RTC)
10 - Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
11 - Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
14 RTC hardware module present on S32G2/S32G3 SoCs is used as a wakeup source.
15 It is not kept alive during system reset and it is not battery-powered.
18 - $ref: rtc.yaml#
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Ds32g3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2021-2024 NXP
7 * Andra-Teodora Ilie <andra.ilie@nxp.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cpu-map {
[all …]
H A Ds32g2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * NXP S32G2 SoC family
6 * Copyright 2017-2021, 2024 NXP
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "nxp,s32g2";
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
18 #address-cells = <2>;
[all …]