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Searched +full:rz +full:- +full:ssi (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/spi/
H A Dsnps,dw-apb-ssi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
13 - $ref: spi-controller.yaml#
14 - if:
19 - mscc,ocelot-spi
20 - mscc,jaguar2-spi
25 - if:
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/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/Five and RZ/G2UL SoCs
8 #include <dt-bindings/clock/r9a07g043-cpg.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 audio_clk1: audio1-clk {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
19 clock-frequency = <0>;
22 audio_clk2: audio2-clk {
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H A Dr9a07g044.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2L and RZ/G2LC common SoC parts
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
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H A Dr9a07g054.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/V2L SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
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H A Dr9a07g044c2.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2LC R9A07G044C2 SoC specific parts
8 /dts-v1/;
16 /delete-node/ ssi@1004a800;
17 /delete-node/ serial@1004c800;
18 /delete-node/ adc@10059000;
19 /delete-node/ ethernet@11c30000;
H A Dr9a07g044c1.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2LC R9A07G044C1 SoC specific parts
8 /dts-v1/;
15 /delete-node/ cpu-map;
16 /delete-node/ cpu@100;
21 /delete-node/ ssi@1004a800;
22 /delete-node/ serial@1004c800;
23 /delete-node/ adc@10059000;
24 /delete-node/ ethernet@11c30000;
H A Drz-smarc-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/{G2L,G2LC,V2L} SMARC EVK common parts
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 * SSI-WM8978
32 stdout-path = "serial0:115200n8";
36 compatible = "simple-audio-card";
37 simple-audio-card,format = "i2s";
38 simple-audio-card,bitclock-master = <&cpu_dai>;
39 simple-audio-card,frame-master = <&cpu_dai>;
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H A Dr8a774c0-cat874.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/display/tda998x.h>
14 model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
15 compatible = "si-linux,cat874", "renesas,r8a774c0";
26 stdout-path = "serial0:115200n8";
29 hdmi-out {
30 compatible = "hdmi-connector";
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/linux/sound/soc/renesas/
H A Drz-ssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas RZ/G2L ASoC Serial Sound Interface (SSIF-2) Driver
28 /* SSI REGISTER BITS */
75 #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-48kHz */
86 int fifo_sample_size; /* sample capacity of SSI FIFO */
98 int (*transfer)(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm);
117 * The SSI support
172 rz_ssi_stream_get(struct rz_ssi_priv * ssi,struct snd_pcm_substream * substream) rz_ssi_stream_get() argument
182 rz_ssi_is_dma_enabled(struct rz_ssi_priv * ssi) rz_ssi_is_dma_enabled() argument
190 struct rz_ssi_priv *ssi = strm->priv; rz_ssi_set_substream() local
198 rz_ssi_stream_is_valid(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_stream_is_valid() argument
235 rz_ssi_stream_quit(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_stream_quit() argument
249 rz_ssi_clk_setup(struct rz_ssi_priv * ssi,unsigned int rate,unsigned int channels) rz_ssi_clk_setup() argument
309 rz_ssi_set_idle(struct rz_ssi_priv * ssi) rz_ssi_set_idle() argument
333 rz_ssi_start(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_start() argument
391 rz_ssi_swreset(struct rz_ssi_priv * ssi) rz_ssi_swreset() argument
400 rz_ssi_stop(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_stop() argument
448 rz_ssi_pio_recv(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_pio_recv() argument
501 rz_ssi_pio_send(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_pio_send() argument
556 struct rz_ssi_priv *ssi = data; rz_ssi_interrupt() local
645 rz_ssi_dma_slave_config(struct rz_ssi_priv * ssi,struct dma_chan * dma_ch,bool is_play) rz_ssi_dma_slave_config() argument
661 rz_ssi_dma_transfer(struct rz_ssi_priv * ssi,struct rz_ssi_stream * strm) rz_ssi_dma_transfer() argument
733 rz_ssi_release_dma_channels(struct rz_ssi_priv * ssi) rz_ssi_release_dma_channels() argument
748 rz_ssi_dma_request(struct rz_ssi_priv * ssi,struct device * dev) rz_ssi_dma_request() argument
787 rz_ssi_trigger_resume(struct rz_ssi_priv * ssi) rz_ssi_trigger_resume() argument
803 rz_ssi_streams_suspend(struct rz_ssi_priv * ssi) rz_ssi_streams_suspend() argument
816 struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); rz_ssi_dai_trigger() local
876 struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); rz_ssi_dai_set_fmt() local
925 rz_ssi_is_valid_hw_params(struct rz_ssi_priv * ssi,unsigned int rate,unsigned int channels,unsigned int sample_width,unsigned int sample_bits) rz_ssi_is_valid_hw_params() argument
939 rz_ssi_cache_hw_params(struct rz_ssi_priv * ssi,unsigned int rate,unsigned int channels,unsigned int sample_width,unsigned int sample_bits) rz_ssi_cache_hw_params() argument
954 struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); rz_ssi_dai_hw_params() local
1029 struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai); rz_ssi_pcm_pointer() local
1074 struct rz_ssi_priv *ssi; rz_ssi_probe() local
1218 struct rz_ssi_priv *ssi = dev_get_drvdata(&pdev->dev); rz_ssi_remove() local
1233 struct rz_ssi_priv *ssi = dev_get_drvdata(dev); rz_ssi_runtime_suspend() local
1240 struct rz_ssi_priv *ssi = dev_get_drvdata(dev); rz_ssi_runtime_resume() local
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
40 tristate "R-Car series SRU/SCU/SSIU/SSI support"
47 This option enables R-Car SRU/SCU/SSIU/SSI sound support
50 tristate "R-Car series MSIOF support"
54 This option enables R-Car MSIOF sound support
57 tristate "RZ/G2L series SSIF-2 support"
60 This option enables RZ/G2L SSIF-2 sound support.
76 tristate "SIU sound support on Migo-R"
81 This option enables sound support for the SH7722 Migo-R board
/linux/drivers/clk/renesas/
H A Dr8a7743-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/soc/renesas/rcar-rst.h>
14 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
16 #include "renesas-cpg-mssr.h"
17 #include "rcar-gen2-cpg.h"
86 DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS),
87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
104 DEF_MOD("sys-dmac1", 218, R8A7743_CLK_ZS),
105 DEF_MOD("sys-dmac0", 219, R8A7743_CLK_ZS),
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