Searched +full:rxer +full:- +full:pins (Results 1 – 1 of 1) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 Bindings for the JH7100 RISC-V SoC from StarFive Ltd.12 Out of the SoC's many pins only the ones named PAD_GPIO[0] to PAD_GPIO[63]15 interesting 2-layered approach to pin muxing best illustrated by the diagram21 LCD output -----------------| |22 CMOS Camera interface ------| |--- PAD_GPIO[0]23 Ethernet PHY interface -----| MUX |--- PAD_GPIO[1][all …]