| /linux/drivers/hsi/clients/ |
| H A D | hsi_char.c | 342 static int hsc_rx_set(struct hsi_client *cl, struct hsc_rx_config *rxc) in hsc_rx_set() argument
347 if ((rxc->mode != HSI_MODE_STREAM) && (rxc->mode != HSI_MODE_FRAME)) in hsc_rx_set()
349 if ((rxc->channels == 0) || (rxc->channels > HSC_DEVS)) in hsc_rx_set()
351 if (rxc->channels & (rxc->channels - 1)) in hsc_rx_set()
353 if ((rxc->flow != HSI_FLOW_SYNC) && (rxc->flow != HSI_FLOW_PIPE)) in hsc_rx_set()
356 cl->rx_cfg.mode = rxc->mode; in hsc_rx_set()
357 cl->rx_cfg.num_hw_channels = rxc->channels; in hsc_rx_set()
358 cl->rx_cfg.flow = rxc->flow; in hsc_rx_set()
364 if (rxc->mode == HSI_MODE_FRAME) in hsc_rx_set()
370 static inline void hsc_rx_get(struct hsi_client *cl, struct hsc_rx_config *rxc) in hsc_rx_get() argument
[all …]
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| /linux/drivers/mfd/ |
| H A D | dln2.c | 193 struct dln2_rx_context *rxc; in dln2_transfer_complete() local
200 rxc = &rxs->slots[rx_slot]; in dln2_transfer_complete()
203 if (rxc->in_use && !rxc->urb) { in dln2_transfer_complete()
204 rxc->urb = urb; in dln2_transfer_complete()
205 complete(&rxc->done); in dln2_transfer_complete()
365 struct dln2_rx_context *rxc = &rxs->slots[*slot]; in find_free_slot() local
368 rxc->in_use = true; in find_free_slot()
398 struct dln2_rx_context *rxc; in free_rx_slot() local
406 rxc = &rxs->slots[slot]; in free_rx_slot()
407 rxc->in_use = false; in free_rx_slot()
[all …]
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| /linux/drivers/net/wireless/mediatek/mt76/mt76x0/ |
| H A D | initvals_init.h | 112 { MT_BBP(RXC, 1), 0x00000012 },
113 { MT_BBP(RXC, 2), 0x00000011 },
114 { MT_BBP(RXC, 3), 0x00000005 },
115 { MT_BBP(RXC, 4), 0x00000000 },
116 { MT_BBP(RXC, 5), 0xF977C4EC },
117 { MT_BBP(RXC, 7), 0x00000090 },
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | mediatek,star-emac.yaml | 51 mediatek,rmii-rxc:
55 PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
57 mediatek,rxc-inverse:
60 If present, indicates that clock on RXC pad will be inversed.
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| H A D | mediatek-dwmac.yaml | 102 mediatek,rmii-rxc:
106 PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
124 mediatek,rxc-inverse:
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| H A D | engleder,tsnep.yaml | 95 rxc-skew-ps = <1080>;
115 rxc-skew-ps = <1080>;
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | sama5d3xmb_gmac.dtsi | 24 rxc-skew-ps = <3000>;
38 rxc-skew-ps = <3000>;
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | rzg3e-smarc-som.dtsi | 131 rxc-skew-psec = <1400>;
152 rxc-skew-psec = <1400>;
182 <RZG3E_PORT_PINMUX(B, 0, 1)>, /* RXC */
207 <RZG3E_PORT_PINMUX(E, 0, 1)>, /* RXC */
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| H A D | rzg2ul-smarc-som.dtsi | 82 rxc-skew-psec = <2400>;
110 rxc-skew-psec = <2400>;
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| /linux/arch/powerpc/sysdev/ |
| H A D | tsi108_dev.c | 130 * "txc-rxc-delay-disable" property enables this in tsi108_eth_of_init()
135 if (of_property_read_bool(phy, "txc-rxc-delay-disable")) in tsi108_eth_of_init()
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| /linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-nas4220b.dts | 114 pins = "Y7 GMAC0 RXC", "Y11 GMAC1 RXC";
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| H A D | gemini-sq201.dts | 189 pins = "Y7 GMAC0 RXC";
205 pins = "Y11 GMAC1 RXC";
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| H A D | gemini-sl93512r.dts | 197 pins = "T11 GMAC1 RXC";
213 pins = "T8 GMAC0 RXC";
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| H A D | gemini-dlink-dns-313.dts | 243 pins = "T8 GMAC0 RXC";
247 pins = "T11 GMAC1 RXC";
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| /linux/drivers/tty/serial/ |
| H A D | men_z135_uart.c | 218 * Read RXC register from hardware and return current FIFO fill size.
224 u16 rxc; in get_rx_fifo_content() local
232 rxc = rxc_lo | (rxc_hi << 8); in get_rx_fifo_content()
234 return rxc; in get_rx_fifo_content()
390 /* It's save to write to IIR[7:6] RXC[9:8] */ in men_z135_intr()
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6dl-mba6.dtsi | 21 rxc-skew-ps = <1860>;
|
| /linux/drivers/net/wan/ |
| H A D | c101.c | 153 rxs |= CLK_LINE_RX; /* RXC input */ in c101_set_iface()
158 rxs |= CLK_LINE_RX; /* RXC input */ in c101_set_iface()
163 rxs |= CLK_LINE_RX; /* RXC input */ in c101_set_iface()
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| H A D | pci200syn.c | 126 rxs |= CLK_LINE; /* RXC input */ in pci200_set_iface()
131 rxs |= CLK_LINE; /* RXC input */ in pci200_set_iface()
136 rxs |= CLK_LINE; /* RXC input */ in pci200_set_iface()
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| H A D | pc300too.c | 126 rxs |= CLK_LINE; /* RXC input */ in pc300_set_iface()
131 rxs |= CLK_LINE; /* RXC input */ in pc300_set_iface()
136 rxs |= CLK_LINE; /* RXC input */ in pc300_set_iface()
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| H A D | n2.c | 170 rxs |= CLK_LINE_RX; /* RXC input */ in n2_set_iface()
176 rxs |= CLK_LINE_RX; /* RXC input */ in n2_set_iface()
182 rxs |= CLK_LINE_RX; /* RXC input */ in n2_set_iface()
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| /linux/arch/powerpc/boot/dts/ |
| H A D | holly.dts | 69 txc-rxc-delay-disable;
75 txc-rxc-delay-disable;
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| /linux/drivers/net/ethernet/qlogic/qede/ |
| H A D | qede_ethtool.c | 822 u16 rxc, txc; in qede_set_coalesce() local
851 rxc = (u16)coal->rx_coalesce_usecs; in qede_set_coalesce()
858 rxc, 0, in qede_set_coalesce()
865 edev->coal_entry[i].rxc = rxc; in qede_set_coalesce()
2146 u16 rxc, txc; in qede_set_per_coalesce() local
2159 rxc = (u16)coal->rx_coalesce_usecs; in qede_set_per_coalesce()
2178 rxc, 0, in qede_set_per_coalesce()
2185 edev->coal_entry[queue].rxc = rxc; in qede_set_per_coalesce()
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| /linux/arch/arm/mach-imx/ |
| H A D | mach-imx7d.c | 19 /* enable RXC skew select RGMII copper mode */ in bcm54220_phy_fixup()
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| /linux/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_arria10_mercury_aa1.dtsi | 53 rxc-skew-ps = <1680>; /* 780ps */
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| H A D | socfpga_cyclone5_de0_nano_soc.dts | 59 rxc-skew-ps = <1680>; /* 780ps */
|