Home
last modified time | relevance | path

Searched +full:rx +full:- +full:burst +full:- +full:size +full:- +full:dword (Results 1 – 25 of 34) sorted by relevance

12

/linux/Documentation/devicetree/bindings/usb/
H A Dchipidea,usb2-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
25 clock-names:
31 power-domains:
37 reset-names:
40 "#reset-cells":
48 itc-setting:
[all …]
H A Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nuvoton,npcm750-udc
[all …]
H A Dchipidea,usb2-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
15 - enum:
16 - fsl,imx27-usb
17 - items:
18 - enum:
19 - fsl,imx23-usb
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /delete-node/ &enet1_lpcg;
7 /delete-node/ &fec2;
8 /delete-node/ &usbotg3;
9 /delete-node/ &usb3_phy;
10 /delete-node/ &usb3_lpcg;
13 conn_enet0_root_clk: clock-conn-enet0-root {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <250000000>;
[all …]
H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
H A Dimx8-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 conn_axi_clk: clock-conn-axi {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <333333333>;
14 clock-output-names = "conn_axi_clk";
17 conn_ahb_clk: clock-conn-ahb {
[all …]
H A Ds32g2.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 * Copyright 2017-2021, 2024-2025 NXP
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "arm,scmi-shmem";
[all …]
H A Ds32g3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright 2021-2025 NXP
7 * Andra-Teodora Ilie <andra.ilie@nxp.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <0x02>;
16 #size-cells = <0x02>;
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cpu-map {
[all …]
/linux/sound/pci/ice1712/
H A Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
81 #define VT1724_REG_MPU_RXFIFO 0x0b /*byte ro. number of bytes in RX fifo*/
91 #define VT1724_REG_MPU_FIFO_WM 0x0e /*byte set the high/low watermarks for RX/TX fifos*/
92 #define VT1724_MPU_RX_FIFO 0x20 //1=rx fifo watermark 0=tx fifo watermark
105 #define VT1724_REG_GPIO_DIRECTION 0x18 /* dword? (3 bytes) 0=input 1=output.
106 bit3 - during reset used for Eeprom power-on strapping
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
[all …]
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
/linux/drivers/net/ethernet/atheros/atlx/
H A Datl1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
4 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
5 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
8 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
82 /* Wake-On-Lan control register */
89 /* WOL Length ( 2 DWORD ) */
165 /* Rx jumbo packet threshold and rrd retirement timer */
215 /* RX/TX count-down timer to trigger CMB-write. 2us resolution. */
265 /* Normal Interrupt mask without RX/TX enabled */
[all …]
/linux/drivers/net/wireless/ath/ath11k/
H A Ddebugfs_htt_stats.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
146 /* Length should be multiple of DWORD */
209 /* NOTE: Variable length TLV, use length spec to infer array size */
215 /* NOTE: Variable length TLV, use length spec to infer array size */
221 /* NOTE: Variable length TLV, use length spec to infer array size */
227 /* NOTE: Variable length TLV, use length spec to infer array size */
233 /* NOTE: Variable length TLV, use length spec to infer array size */
247 /* NOTE: Variable length TLV, use length spec to infer array size .
[all …]
/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define PCI_VPD_ROM_SZ 7L<<14 /* VPD ROM size 0=256, 1=512, ... */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
138 CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */
221 IS_NO_STAT_M1 = 1<<9, /* No Rx Status from MAC 1 */
222 IS_NO_STAT_M2 = 1<<8, /* No Rx Status from MAC 2 */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
[all …]
H A Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
50 PCI_VPD_ROM_SZ = 7L<<14, /* Bit 16..14: VPD ROM Size */
[all …]
/linux/drivers/ata/
H A Dsata_dwc_460ex.c1 // SPDX-License-Identifier: GPL-2.0-or-later
38 #define DRV_NAME "sata-dwc"
44 #define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */
59 u32 dbtsr; /* DMA Burst Transac size */
75 u32 bistdecr; /* BIST Dword Error count register */
118 #define SATA_DWC_DBTSR_MWR(size) (((size)/4) & SATA_DWC_TXFIFO_DEPTH) argument
119 #define SATA_DWC_DBTSR_MRD(size) ((((size)/4) & SATA_DWC_RXFIFO_DEPTH)\ argument
123 struct ata_probe_ent *pe; /* ptr to probe-ent */
155 #define HSDEV_FROM_HOST(host) ((struct sata_dwc_device *)(host)->private_data)
156 #define HSDEV_FROM_AP(ap) ((struct sata_dwc_device *)(ap)->host->private_data)
[all …]
/linux/drivers/usb/cdns3/
H A Dcdnsp-gadget.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 #include <linux/io-64-nonatomic-lo-hi.h>
19 /* Max number slots - only 1 is allowed. */
43 * struct cdnsp_cap_regs - CDNSP Registers.
46 * @hcs_params1: HCSPARAMS1 - Structural Parameters 1
47 * @hcs_params2: HCSPARAMS2 - Structural Parameters 2
48 * @hcs_params3: HCSPARAMS3 - Structural Parameters 3
49 * @hcc_params: HCCPARAMS - Capability Parameters
50 * @db_off: DBOFF - Doorbell array offset
51 * @run_regs_off: RTSOFF - Runtime register space offset
[all …]
/linux/drivers/net/wan/
H A Dwanxlfw.S1 /* SPDX-License-Identifier: GPL-2.0-only */
14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0
15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1
16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2
17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3
20 000 5FF 1536 Bytes Dual-Port RAM User Data / BDs
21 600 6FF 256 Bytes Dual-Port RAM User Data / BDs
22 700 7FF 256 Bytes Dual-Port RAM User Data / BDs
23 C00 CBF 192 Bytes Dual-Port RAM Parameter RAM Page 1
24 D00 DBF 192 Bytes Dual-Port RAM Parameter RAM Page 2
[all …]
/linux/drivers/net/ethernet/packetengines/
H A Dhamachi.c1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
3 Written 1998-2000 by Donald Becker.
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
23 [link no longer provides useful info -jgarzik]
34 /* A few user-configurable values. */
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
42 /* Default values selected by testing on a dual processor PIII-450 */
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
[all …]
/linux/drivers/net/fddi/skfp/h/
H A Dskfbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 * FDDI-Fx (x := {I(SA), P(CI)})
19 /*--------------------------------------------------------------------------*/
41 /* 0x0001 - 0x0003: reserved */
49 /* 0x0010 - 0x006b: formac+ (supernet_3) fequently used registers */
52 #define B0_ST1U 0x0010 /* read upper 16-bit of status reg 1 */
53 #define B0_ST1L 0x0014 /* read lower 16-bit of status reg 1 */
54 #define B0_ST2U 0x0018 /* read upper 16-bit of status reg 2 */
55 #define B0_ST2L 0x001c /* read lower 16-bit of status reg 2 */
59 #define B0_MDRU 0x0028 /* r/w upper 16-bit of mem. data reg */
[all …]
/linux/drivers/net/wireless/ath/ath10k/
H A Dwmi.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
29 * 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
45 * variable is already 4-byte aligned by virtue of being a u32
527 * for wmi_services is 64 as target is using only 4-bits of each 32-bi
3102 __le32 size; global() member
4707 struct wmi_pdev_stats_rx rx; global() member
4723 struct wmi_pdev_stats_rx rx; global() member
4737 struct wmi_pdev_stats_rx rx; global() member
4747 struct wmi_pdev_stats_rx rx; global() member
[all...]
/linux/drivers/net/wireless/intel/iwlegacy/
H A Dcommands.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
92 /* Multi-Station support */
99 /* RX, TX, LEDs */
138 /* RF-KILL commands and notifications */
184 * when sending the response to each driver-originated command, so
196 * 0:7 tfd idx - position within TX queue
199 * 14 huge - driver sets this to indicate command is in the
201 * 15 unsolicited RX or uCode-originated notification
[all …]
H A D3945-mac.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
22 #include <linux/dma-mapping.h>
41 #include "iwl-spectrum.h"
62 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
79 * il3945_get_antenna_flags - Get antenna flags for RXON command
82 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
85 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
86 * IL_ANTENNA_MAIN - Force MAIN antenna
[all …]
/linux/drivers/net/ethernet/dec/tulip/
H A Ddmfe.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 DAVICOM Web-Site: www.davicom.com.tw
10 Author: Sten Wang, 886-3-5798797-8517, E-mail: sten_wang@davicom.com.tw
13 (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
22 Removed IRQ 0-15 assumption
69 #include <linux/dma-mapping.h>
91 /* Board/System/Debug information/definition ---------------- */
101 #define RX_DESC_CNT 0x20 /* Allocated Rx descriptors */
102 #define TX_FREE_DESC_CNT (TX_DESC_CNT - 2) /* Max TX packet count */
103 #define TX_WAKE_DESC_CNT (TX_DESC_CNT - 3) /* TX wakeup count */
[all …]
/linux/drivers/net/wireless/intel/ipw2x00/
H A Dipw2200.c1 // SPDX-License-Identifier: GPL-2.0-only
4 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
6 802.11 status code portion of this file from ethereal-0.10.6:
8 Ethereal - Network traffic analyzer
15 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
21 #include <net/cfg80211-wext.h>
64 #define DRV_COPYRIGHT "Copyright(c) 2003-200
271 snprintk_buf(u8 * output,size_t size,const u8 * data,size_t len) snprintk_buf() argument
2890 u32 size; ipw_fw_dma_add_buffer() local
3180 int size; ipw_load_firmware() local
3696 ipw_queue_init(struct ipw_priv * priv,struct clx2_queue * q,int count,u32 read,u32 write,u32 base,u32 size) ipw_queue_init() argument
3722 ipw_queue_tx_init(struct ipw_priv * priv,struct clx2_tx_queue * q,int count,u32 read,u32 write,u32 base,u32 size) ipw_queue_tx_init() argument
4429 u16 size = le16_to_cpu(notif->size); ipw_rx_notification() local
6802 u32 size = sizeof(struct libipw_qos_parameters); ipw_qos_handle_probe_response() local
6864 u32 size = sizeof(struct libipw_qos_parameters); ipw_qos_activate() local
7012 u32 size = sizeof(struct libipw_qos_parameters); ipw_qos_association_resp() local
10205 int size = txb->fragments[j]->len - hdr_len; ipw_tx_skb() local
[all...]

12