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/linux/Documentation/devicetree/bindings/usb/
H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
[all …]
H A Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
16 which the device and its descriptors are compliant, in binary-coded
18 features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
25 Tells Dual-Role USB controllers that we want to work on a particular
26 mode. In case this attribute isn't passed via DT, USB DRD controllers
[all …]
H A Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
[all …]
H A Drealtek,rtd-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/realtek,rtd-dwc3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stanley Chang <stanley_chang@realtek.com>
15 and USB 3.0 in host or dual-role mode.
20 - enum:
21 - realtek,rtd1295-dwc3
22 - realtek,rtd1315e-dwc3
23 - realtek,rtd1319-dwc3
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/linux/drivers/usb/cdns3/
H A DKconfig8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
34 Cadence USBSS-DEV driver.
36 This controller supports FF, HS and SS mode. It doesn't support
37 LS and SSP mode.
51 tristate "Cadence USB3 support on PCIe-based platforms"
53 default USB_CDNS3
[all …]
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 NXP
6 * Copyright (C) 2018-2019 Cadence.
15 #include <linux/usb/role.h>
20 * struct cdns_role_driver - host/gadget role driver
21 * @start: start this role
22 * @stop: stop this role
23 * @suspend: suspend callback for this role
24 * @resume: resume callback for this role
25 * @irq: irq handler for this role
[all …]
/linux/drivers/usb/dwc3/
H A Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB3 DRD Controller Dual-role support
5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com
21 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_disable_events()
24 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_disable_events()
29 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVTEN); in dwc3_otg_enable_events()
32 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_enable_events()
37 u32 reg = dwc3_readl(dwc->regs, DWC3_OEVT); in dwc3_otg_clear_events()
39 dwc3_writel(dwc->regs, DWC3_OEVTEN, reg); in dwc3_otg_clear_events()
56 spin_lock(&dwc->lock); in dwc3_otg_thread_irq()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
10 Say Y or M here if your system has a Dual Role SuperSpeed
26 prompt "DWC3 Mode Selection"
27 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
28 default USB_DWC3_HOST if (USB && !USB_GADGET)
29 default USB_DWC3_GADGET if (!USB && USB_GADGET)
32 bool "Host only mode"
35 Select this when you want to use DWC3 in host mode only,
39 bool "Gadget only mode"
42 Select this when you want to use DWC3 in gadget mode only,
[all …]
H A Ddwc3-apple.c1 // SPDX-License-Identifier: GPL-2.0
7 * - dwc3-qcom.c Copyright (c) 2018, The Linux Foundation. All rights reserved.
8 * - dwc3-of-simple.c Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com
22 * 1) The PHY itself has to be brought up; for this we need to know the mode (USB3,
25 * 3) The PHY bring-up has to be finalized and dwc3's PIPE interface has to be switched to the
27 * 4) We can now initialize xhci or gadget mode.
29 * We can switch 1 and 2 but 3 has to happen after (1 and 2) and 4 has to happen after 3.
33 * 1) DWC3 has to exit host or gadget mode and must no longer touch those registers
34 * 2) The PHY has to switch dwc3's PIPE interface back to the dummy backend
37 * We also can't transition the PHY from one mode to another while dwc3 is up and running (this is
[all …]
/linux/drivers/usb/dwc2/
H A Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
3 * drd.c - DesignWare USB2 DRD Controller Dual-role support
13 #include <linux/usb/role.h>
25 spin_lock_irqsave(&hsotg->lock, flags); in dwc2_ovr_init()
30 if (hsotg->role_sw_default_mode == USB_DR_MODE_HOST) in dwc2_ovr_init()
32 else if (hsotg->role_sw_default_mode == USB_DR_MODE_PERIPHERAL) in dwc2_ovr_init()
36 spin_unlock_irqrestore(&hsotg->lock, flags); in dwc2_ovr_init()
38 dwc2_force_mode(hsotg, (hsotg->dr_mode == USB_DR_MODE_HOST) || in dwc2_ovr_init()
39 (hsotg->role_sw_default_mode == USB_DR_MODE_HOST)); in dwc2_ovr_init()
46 /* Check if A-Session is already in the right state */ in dwc2_ovr_avalid()
[all …]
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101-pixel-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree nodes common for all GS101-based Pixel
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
25 stdout-path = &serial_0;
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/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/linux/Documentation/driver-api/usb/
H A Dtypec.rst3 USB Type-C connector class
7 ------------
9 The typec class is meant for describing the USB Type-C ports in a system to the
14 The platforms are expected to register every USB Type-C port they have with the
15 class. In a normal case the registration will be done by a USB Type-C or PD PHY
18 considers the component registering the USB Type-C ports with the class as "port
26 attributes are described in Documentation/ABI/testing/sysfs-class-typec.
29 --------------------
36 "port0-partner". Full path to the device would be
37 /sys/class/typec/port0/port0-partner/.
[all …]
/linux/drivers/usb/typec/
H A Dhd3ss3220.c1 // SPDX-License-Identifier: GPL-2.0+
3 * TI HD3SS3220 Type-C DRP Port Controller Driver
10 #include <linux/usb/role.h>
71 switch (power_opmode) { in hd3ss3220_set_power_opmode()
82 default: in hd3ss3220_set_power_opmode()
83 dev_err(hd3ss3220->dev, "bad power operation mode: %d\n", power_opmode); in hd3ss3220_set_power_opmode()
84 return -EINVAL; in hd3ss3220_set_power_opmode()
87 return regmap_update_bits(hd3ss3220->regmap, HD3SS3220_REG_CN_STAT, in hd3ss3220_set_power_opmode()
96 switch (type) { in hd3ss3220_set_port_type()
106 default: in hd3ss3220_set_port_type()
[all …]
H A Dwusb3801.c1 // SPDX-License-Identifier: GPL-2.0
3 * Willsemi WUSB3801 Type-C port controller driver
101 switch (wusb3801->port_type) { in wusb3801_get_default_role()
107 default: in wusb3801_get_default_role()
108 if (wusb3801->cap.prefer_role == TYPEC_SOURCE) in wusb3801_get_default_role()
116 switch (type) { in wusb3801_map_port_type()
122 default: in wusb3801_map_port_type()
127 static int wusb3801_map_pwr_opmode(enum typec_pwr_opmode mode) in wusb3801_map_pwr_opmode() argument
129 switch (mode) { in wusb3801_map_pwr_opmode()
131 default: in wusb3801_map_pwr_opmode()
[all …]
H A Danx7411.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Driver for Analogix ANX7411 USB Type-C and PD controller
24 #include <linux/usb/role.h>
339 int mode; in anx7411_detect_power_mode() local
341 ret = anx7411_reg_read(ctx->spi_client, REQUEST_CURRENT); in anx7411_detect_power_mode()
345 ctx->typec.request_current = ret * CURRENT_UNIT; /* 50ma per unit */ in anx7411_detect_power_mode()
347 ret = anx7411_reg_read(ctx->spi_client, REQUEST_VOLTAGE); in anx7411_detect_power_mode()
351 ctx->typec.request_voltage = ret * VOLTAGE_UNIT; /* 100mv per unit */ in anx7411_detect_power_mode()
353 if (ctx->psy_online == ANX7411_PSY_OFFLINE) { in anx7411_detect_power_mode()
354 ctx->psy_online = ANX7411_PSY_FIXED_ONLINE; in anx7411_detect_power_mode()
[all …]
/linux/drivers/usb/mtu3/
H A Dmtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3.h - MediaTek USB3 DRD header
26 #include <linux/usb/role.h>
35 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
39 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
40 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
41 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
43 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
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/linux/drivers/platform/chrome/
H A Dcros_ec_typec.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #define DRV_NAME "cros-ec-typec"
35 /* Supply the USB role switch with the correct pld_crc if it's missing. */ in cros_typec_role_switch_quirk()
36 switch_fwnode = fwnode_find_reference(fwnode, "usb-role-switch", 0); in cros_typec_role_switch_quirk()
40 if (adev && !adev->pld_crc) in cros_typec_role_switch_quirk()
41 adev->pld_crc = to_acpi_device_node(fwnode)->pld_crc; in cros_typec_role_switch_quirk()
47 static int cros_typec_enter_usb_mode(struct typec_port *tc_port, enum usb_mode mode) in cros_typec_enter_usb_mode() argument
51 .port = port->port_num, in cros_typec_enter_usb_mode()
52 .command = (mode == USB_MODE_USB4) ? in cros_typec_enter_usb_mode()
57 return cros_ec_cmd(port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, in cros_typec_enter_usb_mode()
[all …]
/linux/drivers/usb/chipidea/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - ChipIdea USB IP core family device controller
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
12 * - Four transfers are supported, usbtest is passed
13 * - USB Certification for gadget: CH9 and Mass Storage are passed
14 * - Low power mode
15 * - USB wakeup
19 #include <linux/dma-mapping.h>
106 ci->hw_bank.regmap[i] = in hw_alloc_regmap()
107 (i <= CAP_LAST ? ci->hw_bank.cap : ci->hw_bank.op) + in hw_alloc_regmap()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-venice-gw71xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 compatible = "gpio-usb-b-connector", "usb-b-connector";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_usbcon1>;
16 label = "Type-C";
17 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
21 remote-endpoint = <&usb3_dwc>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc8180x-lenovo-flex-5g.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 /dts-v1/;
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include "sc8180x-pmics.dtsi"
[all …]
/linux/drivers/usb/typec/ucsi/
H A Ducsi.c1 // SPDX-License-Identifier: GPL-2.0
3 * USB Type-C Connector System Software Interface driver
21 * UCSI_TIMEOUT_MS - PPM communication timeout
31 * UCSI_SWAP_TIMEOUT_MS - Timeout for role swap requests
49 test_and_clear_bit(ACK_PENDING, &ucsi->flags)) in ucsi_notify_common()
50 complete(&ucsi->complete); in ucsi_notify_common()
53 test_and_clear_bit(COMMAND_PENDING, &ucsi->flags)) in ucsi_notify_common()
54 complete(&ucsi->complete); in ucsi_notify_common()
64 set_bit(ACK_PENDING, &ucsi->flags); in ucsi_sync_control_common()
66 set_bit(COMMAND_PENDING, &ucsi->flags); in ucsi_sync_control_common()
[all …]
/linux/drivers/usb/typec/tipd/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/usb/role.h>
76 /* reset de-assertion to ready for operation */
124 /* Debounce delay for mode changes, in milliseconds */
226 static const char *tps6598x_psy_name_prefix = "tps6598x-source-psy-";
241 return -EINVAL; in tps6598x_block_read()
243 if (!tps->i2c_protocol) in tps6598x_block_read()
244 return regmap_raw_read(tps->regmap, reg, val, len); in tps6598x_block_read()
246 ret = regmap_raw_read(tps->regmap, reg, data, len + 1); in tps6598x_block_read()
251 return -EIO; in tps6598x_block_read()
[all …]
/linux/drivers/phy/tegra/
H A Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]
/linux/drivers/usb/phy/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
21 in host mode, low speed.
42 depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, NOP can't be built-in
46 built-in with usb ip or which are autonomous and doesn't require any
73 The definition of internal PHY APIs are in the mach-omap2 layer.
76 tristate "GPIO based peripheral-only VBUS sensing 'transceiver'"
86 NOT support role switch. OTG devices that can do role switch
95 controller is needed to switch between host and peripheral modes.
98 will be called phy-omap-otg.
111 bool "Device in USB host mode by default"
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