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/linux/Documentation/devicetree/bindings/devfreq/event/
H A Drockchip,dfi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/devfreq/event/rockchip,dfi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DFI
10 - Sascha Hauer <s.hauer@pengutronix.de>
15 - rockchip,rk3399-dfi
16 - rockchip,rk3568-dfi
17 - rockchip,rk3588-dfi
22 clock-names:
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/linux/drivers/devfreq/event/
H A Drockchip-dfi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
4 * Author: Lin Huang <hl@rock-chips.com>
8 #include <linux/devfreq-event.h>
27 #include <soc/rockchip/rockchip_grf.h>
28 #include <soc/rockchip/rk3399_grf.h>
29 #include <soc/rockchip/rk3568_grf.h>
30 #include <soc/rockchip/rk3588_grf.h>
67 * struct dmc_count_channel - structure to hold counter values from the DDR controller
85 * The dfi controller can monitor DDR load. It has an upper and lower threshold
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "DEVFREQ-Event device Support"
5 The devfreq-event device provide the raw data and events which
6 indicate the current state of devfreq-event device. The provided
7 data from devfreq-event device is used to monitor the state of
11 The devfreq-event device can support the various type of events
23 This add the devfreq-event driver for Exynos SoC. It provides NoC
31 This add the devfreq-event driver for Exynos SoC. It provides PPMU
36 tristate "ROCKCHIP DFI DEVFREQ event Driver"
39 This add the devfreq-event driver for Rockchip SoC. It provides DFI
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
4 obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP) += exynos-nocp.o
5 obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU) += exynos-ppmu.o
6 obj-$(CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI) += rockchip-dfi.o
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip rk3399 DMC (Dynamic Memory Controller) device
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
21 Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml.
26 clock-names:
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk356x-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
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H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
15 compatible = "rockchip,rk3399";
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H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
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