| /linux/drivers/pci/controller/ |
| H A D | pcie-rockchip-host.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Rockchip AXI PCIe host controller driver 5 * Copyright (c) 2016 Rockchip, Inc. 7 * Author: Shawn Lin <shawn.lin@rock-chips.com> 8 * Wenrui Li <wenrui.li@rock-chips.com> 29 #include "pcie-rockchip.h" 31 static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) in rockchip_pcie_enable_bw_int() argument 35 status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL); in rockchip_pcie_enable_bw_int() 37 rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL); in rockchip_pcie_enable_bw_int() 40 static void rockchip_pcie_clr_bw_int(struct rockchip_pcie *rockchip) in rockchip_pcie_clr_bw_int() argument [all …]
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| H A D | pcie-rockchip-ep.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Rockchip AXI PCIe endpoint controller driver 5 * Copyright (c) 2018 Rockchip, Inc. 7 * Author: Shawn Lin <shawn.lin@rock-chips.com> 8 * Simon Xue <xxm@rock-chips.com> 18 #include <linux/pci-epc.h> 20 #include <linux/pci-epf.h> 24 #include "pcie-rockchip.h" 27 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver 28 * @rockchip: Rockchip PCIe controller [all …]
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| /linux/sound/soc/rockchip/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menu "Rockchip" menu 7 tristate "Rockchip I2S Device Driver" 11 Rockchip I2S device. The device support [all...] |
| H A D | rockchip_pdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver 5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd 31 struct device *dev; 91 if ((div & (div - 1)) == 0) { in get_pdm_clk() 93 rate = clk_round_rate(pdm->clk, clkref[i].clk); in get_pdm_clk() 103 clk = clk_round_rate(pdm->clk, PDM_SIGNOFF_CLK_RATE); in get_pdm_clk() 182 regmap_update_bits(pdm->regmap, PDM_DMA_CTRL, in rockchip_pdm_rxctrl() 184 regmap_update_bits(pdm->regmap, PDM_SYSCONFIG, in rockchip_pdm_rxctrl() 187 regmap_update_bits(pdm->regmap, PDM_DMA_CTRL, in rockchip_pdm_rxctrl() [all …]
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| /linux/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip-drm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only) 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip DRM master device 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 The Rockchip DRM master device is a virtual device needed to list all 20 const: rockchip,display-subsystem 23 $ref: /schemas/types.yaml#/definitions/phandle-array [all …]
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| H A D | rockchip,rk3399-cdn-dp.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3399 specific extensions to the CDN Display Port 10 - Andy Yan <andy.yan@rock-chip.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 - Sandy Huang <hjc@rock-chips.com> 15 - $ref: /schemas/sound/dai-common.yaml# 20 - const: rockchip,rk3399-cdn-dp [all …]
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| /linux/arch/arm/mach-rockchip/ |
| H A D | rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Device Tree support for Rockchip SoCs 24 if (of_machine_is_compatible("rockchip,rk3288")) { in rockchip_timer_init() 41 pr_err("rockchip: could not map timer7 registers\n"); in rockchip_timer_init() 55 "rockchip,rk2928", 56 "rockchip,rk3066a", 57 "rockchip,rk3066b", 58 "rockchip,rk3188", 59 "rockchip,rk3228", 60 "rockchip,rk3288", [all …]
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| /linux/drivers/devfreq/ |
| H A D | rk3399_dmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd. 4 * Author: Lin Huang <hl@rock-chips.com> 7 #include <linux/arm-smccc.h> 12 #include <linux/devfreq-event.h> 24 #include <soc/rockchip/pm_domains.h> 25 #include <soc/rockchip/rockchip_grf.h> 26 #include <soc/rockchip/rk3399_grf.h> 27 #include <soc/rockchip/rockchip_sip.h> 41 struct device *dev; [all …]
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| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3xxx I2C controller 10 This driver interfaces with the native I2C controller present in Rockchip 14 - $ref: /schemas/i2c/i2c-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rv1108-i2c 24 - const: rockchip,rk3066-i2c [all …]
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| /linux/drivers/nvmem/ |
| H A D | rockchip-efuse.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Rockchip eFuse Driver 5 * Copyright (c) 2015 Rockchip Electronics Co. Ltd. 6 * Author: Caesar Wang <wxt@rock-chips.com> 11 #include <linux/device.h> 14 #include <linux/nvmem-provider.h> 50 struct device *dev; 62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read() 64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read() 68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read() [all …]
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| H A D | rockchip-otp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Rockchip OTP Driver 5 * Copyright (c) 2018 Rockchip Electronics Co. Ltd. 6 * Author: Finley Xiao <finley.xiao@rock-chips.com> 11 #include <linux/device.h> 15 #include <linux/nvmem-provider.h> 79 struct device *dev; 90 ret = reset_control_assert(otp->rst); in rockchip_otp_reset() 92 dev_err(otp->dev, "failed to assert otp phy %d\n", ret); in rockchip_otp_reset() 98 ret = reset_control_deassert(otp->rst); in rockchip_otp_reset() [all …]
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | rockchip,inno-usb2phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip USB2.0 phy with inno IP block 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-usb2phy 16 - rockchip,rk3036-usb2phy 17 - rockchip,rk3128-usb2phy 18 - rockchip,rk3228-usb2phy [all …]
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| /linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) Rockchip Electronics Co., Ltd. 4 * Author:Mark Yao <mark.yao@rock-chips.com> 10 #include <linux/dma-mapping.h> 30 #include <asm/dma-iommu.h> 41 #define DRIVER_NAME "rockchip" 42 #define DRIVER_DESC "RockChip Soc DRM" 49 * Attach a (component) device to the shared drm dma mapping from master drm 50 * device. This is used by the VOPs to map GEM buffers to a common DMA 54 struct device *dev) in rockchip_drm_dma_attach_device() [all …]
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | rockchip,rk817.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/rockchip,rk817.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chris Zhong <zyw@rock-chips.com> 11 - Zhang Qing <zhangqing@rock-chips.com> 14 Rockchip RK809/RK817 series PMIC. This device consists of an i2c controlled 21 - rockchip,rk809 22 - rockchip,rk817 30 '#clock-cells': [all …]
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | rockchip,px30-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip PX30 Clock and Reset Unit (CRU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be 20 used in device tree sources. Similar macros exist for the reset sources in 24 clock-output-names: [all …]
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| H A D | rockchip,rk3188-cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/rk3188-cru.h and 20 dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources. 24 clock-output-names: [all …]
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| H A D | rockchip,rk3568-cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ROCKCHIP rk3568 Family Clock Control Module 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be 20 used in device tree sources. 25 - rockchip,rk3568-cru [all …]
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| H A D | rockchip,rk3128-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be 20 used in device tree sources. Similar macros exist for the reset sources in 26 - rockchip,rk3126-cru [all …]
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| H A D | rockchip,rk3399-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3399 Clock and Reset Unit 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be 20 used in device tree sources. Similar macros exist for the reset sources in 24 clock-output-names: [all …]
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| H A D | rockchip,rk3288-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3288 Clock and Reset Unit (CRU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 different so another dt-compatible is available. Noticed that it is only 25 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be 26 used in device tree sources. Similar macros exist for the reset sources in [all …]
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| H A D | rockchip,rk3228-cru.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3228-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3228 Clock and Reset Unit (CRU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/rk3228-cru.h headers and can be 20 used in device tree sources. Similar macros exist for the reset sources in 24 clock-output-names: [all …]
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| H A D | rockchip,rk3328-cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/rockchip,rk3328-cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3328 Clock and Reset Unit (CRU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 19 preprocessor macros in the dt-bindings/clock/rk3328-cru.h headers and can be 20 used in device tree sources. Similar macros exist for the reset sources in 24 clock-output-names: [all …]
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399-khadas-edge.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pwm/pwm.h> 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gmac-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; 27 clock-output-names = "clkin_gmac"; [all …]
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| H A D | rk3399-rockpro64.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; 27 #clock-cells = <0>; [all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip rk3399 DMC (Dynamic Memory Controller) device 10 - Brian Norris <briannorris@chromium.org> 15 - rockchip,rk3399-dmc 17 devfreq-events: 21 Documentation/devicetree/bindings/devfreq/event/rockchip,dfi.yaml. 26 clock-names: [all …]
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