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/linux/drivers/pci/controller/
H A Dpcie-rockchip-host.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Rockchip AXI PCIe host controller driver
5 * Copyright (c) 2016 Rockchip, Inc.
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
29 #include "pcie-rockchip.h"
31 static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) in rockchip_pcie_enable_bw_int() argument
35 status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL); in rockchip_pcie_enable_bw_int()
37 rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_CR + PCI_EXP_LNKCTL); in rockchip_pcie_enable_bw_int()
40 static void rockchip_pcie_clr_bw_int(struct rockchip_pcie *rockchip) in rockchip_pcie_clr_bw_int() argument
[all …]
H A Dpcie-rockchip-ep.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Rockchip AXI PCIe endpoint controller driver
5 * Copyright (c) 2018 Rockchip, Inc.
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Simon Xue <xxm@rock-chips.com>
18 #include <linux/pci-epc.h>
20 #include <linux/pci-epf.h>
24 #include "pcie-rockchip.h"
27 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver
28 * @rockchip: Rockchip PCIe controller
[all …]
/linux/drivers/pci/controller/dwc/
H A Dpcie-dw-rockchip.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Rockchip SoCs.
5 * Copyright (C) 2021 Rockchip Electronics Co., Ltd.
6 * http://www.rock-chips.com
8 * Author: Simon Xue <xxm@rock-chips.com>
27 #include "pcie-designware.h"
34 #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev)
101 static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u3 in rockchip_pcie_writel_apb()
95 rockchip_pcie_readl_apb(struct rockchip_pcie * rockchip,u32 reg) rockchip_pcie_readl_apb() argument
100 rockchip_pcie_writel_apb(struct rockchip_pcie * rockchip,u32 val,u32 reg) rockchip_pcie_writel_apb() argument
109 struct rockchip_pcie *rockchip = irq_desc_get_handler_data(desc); rockchip_pcie_intx_handler() local
156 rockchip_pcie_init_irq_domain(struct rockchip_pcie * rockchip) rockchip_pcie_init_irq_domain() argument
178 rockchip_pcie_get_ltssm(struct rockchip_pcie * rockchip) rockchip_pcie_get_ltssm() argument
183 rockchip_pcie_enable_ltssm(struct rockchip_pcie * rockchip) rockchip_pcie_enable_ltssm() argument
189 rockchip_pcie_disable_ltssm(struct rockchip_pcie * rockchip) rockchip_pcie_disable_ltssm() argument
197 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); rockchip_pcie_link_up() local
220 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); rockchip_pcie_start_link() local
244 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); rockchip_pcie_stop_link() local
252 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); rockchip_pcie_host_init() local
367 struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); rockchip_pcie_get_features() local
378 rockchip_pcie_clk_init(struct rockchip_pcie * rockchip) rockchip_pcie_clk_init() argument
397 rockchip_pcie_resource_get(struct platform_device * pdev,struct rockchip_pcie * rockchip) rockchip_pcie_resource_get() argument
418 rockchip_pcie_phy_init(struct rockchip_pcie * rockchip) rockchip_pcie_phy_init() argument
439 rockchip_pcie_phy_deinit(struct rockchip_pcie * rockchip) rockchip_pcie_phy_deinit() argument
453 struct rockchip_pcie *rockchip = arg; rockchip_pcie_rc_sys_irq_thread() local
481 struct rockchip_pcie *rockchip = arg; rockchip_pcie_ep_sys_irq_thread() local
512 rockchip_pcie_configure_rc(struct platform_device * pdev,struct rockchip_pcie * rockchip) rockchip_pcie_configure_rc() argument
560 rockchip_pcie_configure_ep(struct platform_device * pdev,struct rockchip_pcie * rockchip) rockchip_pcie_configure_ep() argument
624 struct rockchip_pcie *rockchip; rockchip_pcie_probe() local
[all...]
/linux/sound/soc/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Rockchip" menu
7 tristate "Rockchip I2S Device Driver"
11 Rockchip I2S device. The device supports up to maximum of
15 tristate "Rockchip I2S/TDM Device Driver"
19 Rockchip I2S/TDM devices, found in Rockchip SoCs. These devices
25 tristate "Rockchip PDM Controller Driver"
30 Rockchip PDM Controller. The Controller supports up to maximum of
34 tristate "Rockchip SAI Controller Driver"
37 Say Y or M if you want to add support for the Rockchip Serial Audio
[all …]
/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip-drm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip DRM master device
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The Rockchip DRM master device is a virtual device needed to list all
20 const: rockchip,display-subsystem
23 $ref: /schemas/types.yaml#/definitions/phandle-array
[all …]
H A Drockchip,rk3399-cdn-dp.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3399 specific extensions to the CDN Display Port
10 - Andy Yan <andy.yan@rock-chip.com>
11 - Heiko Stuebner <heiko@sntech.de>
12 - Sandy Huang <hjc@rock-chips.com>
15 - $ref: /schemas/sound/dai-common.yaml#
20 - const: rockchip,rk3399-cdn-dp
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Drockchip,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/rockchip,pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Pinmux Controller
10 - Heiko Stuebner <heiko@sntech.de>
13 The Rockchip Pinmux Controller enables the IC to share one PAD
18 Please refer to pinctrl-bindings.txt in this directory for details of the
22 The Rockchip pin configuration node is a node of a group of pins which can be
23 used for a specific device or function. This node represents both mux and
[all …]
/linux/arch/arm/mach-rockchip/
H A Drockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree support for Rockchip SoCs
24 if (of_machine_is_compatible("rockchip,rk3288")) { in rockchip_timer_init()
41 pr_err("rockchip: could not map timer7 registers\n"); in rockchip_timer_init()
55 "rockchip,rk2928",
56 "rockchip,rk3066a",
57 "rockchip,rk3066b",
58 "rockchip,rk3188",
59 "rockchip,rk3228",
60 "rockchip,rk3288",
[all …]
/linux/drivers/devfreq/
H A Drk3399_dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd.
4 * Author: Lin Huang <hl@rock-chips.com>
7 #include <linux/arm-smccc.h>
12 #include <linux/devfreq-event.h>
24 #include <soc/rockchip/pm_domains.h>
25 #include <soc/rockchip/rockchip_grf.h>
26 #include <soc/rockchip/rk3399_grf.h>
27 #include <soc/rockchip/rockchip_sip.h>
41 struct device *dev;
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Drockchip-max98090.txt1 ROCKCHIP with MAX98090 CODEC
4 - compatible: "rockchip,rockchip-audio-max98090"
5 - rockchip,model: The user-visible name of this sound complex
6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
10 - rockchip,audio-codec: The phandle of the MAX98090 audio codec.
11 - rockchip,headset-codec: The phandle of Ext chip for jack detection. This is
12 required if there is rockchip,audio-codec.
13 - rockchip,hdmi-codec: The phandle of HDMI device for HDMI codec.
17 /* For max98090-only board. */
19 compatible = "rockchip,rockchip-audio-max98090";
[all …]
/linux/drivers/mfd/
H A Drk8xx-i2c.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
8 * Author: Chris Zhong <zyw@rock-chips.com>
9 * Author: Zhang Qing <zhangqing@rock-chips.com>
24 static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg) in rk806_is_volatile_reg()
35 static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg) in rk808_is_volatile_reg()
39 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but in rk808_is_volatile_reg()
41 * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since in rk808_is_volatile_reg()
63 static bool rk816_is_volatile_reg(struct device *dev, unsigned int reg) in rk816_is_volatile_reg()
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
[all …]
/linux/drivers/nvmem/
H A Drockchip-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip eFuse Driver
5 * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
6 * Author: Caesar Wang <wxt@rock-chips.com>
11 #include <linux/device.h>
14 #include <linux/nvmem-provider.h>
50 struct device *dev;
62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read()
64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read()
68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
[all …]
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Rockchip Electronics Co., Ltd.
4 * Author:Mark Yao <mark.yao@rock-chips.com>
10 #include <linux/dma-mapping.h>
30 #include <asm/dma-iommu.h>
41 #define DRIVER_NAME "rockchip"
42 #define DRIVER_DESC "RockChip Soc DRM"
49 * Attach a (component) device to the shared drm dma mapping from master drm
50 * device. This is used by the VOPs to map GEM buffers to a common DMA
54 struct device *dev) in rockchip_drm_dma_attach_device()
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drockchip,inno-usb2phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip USB2.0 phy with inno IP block
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk3036-usb2phy
17 - rockchip,rk3128-usb2phy
18 - rockchip,rk3228-usb2phy
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3368-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "rockchip,rk3368";
[all …]
H A Drk3399-khadas-edge.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pwm/pwm.h>
21 stdout-path = "serial2:1500000n8";
24 clkin_gmac: external-gmac-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "clkin_gmac";
[all …]
H A Drk3588-turing-rk1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree definitions for the Turing RK1 SoM.
7 * Based on RK3588-EVB1 devicetree
8 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
11 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
17 compatible = "turing,rk1", "rockchip,rk3588";
24 fan: pwm-fan {
25 compatible = "pwm-fan";
[all …]
/linux/Documentation/devicetree/bindings/mfd/
H A Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rockchip,rk817.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
14 Rockchip RK809/RK817 series PMIC. This device consists of an i2c controlled
21 - rockchip,rk809
22 - rockchip,rk817
30 '#clock-cells':
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,px30-cru.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip PX30 Clock and Reset Unit (CRU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be
20 used in device tree sources. Similar macros exist for the reset sources in
24 clock-output-names:
[all …]
H A Drockchip,rk3188-cru.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
20 dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
24 clock-output-names:
[all …]
H A Drockchip,rk3568-cru.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROCKCHIP rk3568 Family Clock Control Module
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be
20 used in device tree sources.
25 - rockchip,rk3568-cru
[all …]
H A Drockchip,rk3128-cru.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
20 used in device tree sources. Similar macros exist for the reset sources in
26 - rockchip,rk3126-cru
[all …]
H A Drockchip,rk3399-cru.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3399 Clock and Reset Unit
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
19 preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
20 used in device tree sources. Similar macros exist for the reset sources in
24 clock-output-names:
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #address-cells = <2>;
[all …]

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