Searched +full:rmii +full:- +full:refclk +full:- +full:out (Results 1 – 6 of 6) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0+3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Andrew Lunn <andrew@lunn.ch>11 - Florian Fainelli <f.fainelli@gmail.com>12 - Heiner Kallweit <hkallweit1@gmail.com>20 - ethernet-phy-id0180.dc4021 - ethernet-phy-id0180.dc4122 - ethernet-phy-id0180.dc4823 - ethernet-phy-id0180.dd00[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 #include <dt-bindings/clock/rk3308-cru.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>11 #include <dt-bindings/pinctrl/rockchip.h>12 #include <dt-bindings/soc/rockchip,boot-mode.h>13 #include <dt-bindings/thermal/thermal.h>18 interrupt-parent = <&gic>;19 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/px30-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/px30-power.h>12 #include <dt-bindings/soc/rockchip,boot-mode.h>13 #include <dt-bindings/thermal/thermal.h>18 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/rk3399-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/rk3399-power.h>12 #include <dt-bindings/thermal/thermal.h>17 interrupt-parent = <&gic>;18 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 #include <dt-bindings/clock/pistachio-clk.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/interrupt-controller/mips-gic.h>11 #include <dt-bindings/reset/pistachio-resets.h>16 #address-cells = <1>;17 #size-cells = <1>;19 interrupt-parent = <&gic>;22 #address-cells = <1>;[all …]
2 * Copyright (c) 2017-2018 Cavium, Inc. 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…116 … (0x1<<9) // Fast back-to-back transaction ena…128 … (0x1<<23) // Fast back-to-back capable. Not ap…[all …]