Searched +full:rk3568 +full:- +full:pipe +full:- +full:phy +full:- +full:grf (Results 1 – 9 of 9) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-rockchip-naneng-combphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SoC Naneng Combo Phy 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,rk3568-naneng-combphy 16 - rockchip,rk3588-naneng-combphy 23 - description: reference clock 24 - description: apb clock [all …]
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| H A D | rockchip,pcie3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip PCIe v3 phy 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,rk3568-pcie3-phy 16 - rockchip,rk3588-pcie3-phy 25 clock-names: 29 data-lanes: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/ |
| H A D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip General Register Files (GRF) 10 - Heiko Stuebner <heiko@sntech.de> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 compatible = "rockchip,rk3568"; 12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; 16 clock-names = "sata", "pmalive", "rxoob"; 19 phy-names = "sata-phy"; 20 ports-implemented = <0x1>; 21 power-domains = <&power RK3568_PD_PIPE>; 26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; 31 compatible = "rockchip,rk3568-qos", "syscon"; 36 compatible = "rockchip,rk3568-qos", "syscon"; [all …]
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| H A D | rk356x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
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| H A D | rk3588-extra.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "rk3588-base.dtsi" 7 #include "rk3588-extra-pinctrl.dtsi" 11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; 16 clock-names = "ref_clk", "suspend_clk", "bus_clk"; 19 phy-names = "usb2-phy", "usb3-phy"; 21 power-domains = <&power RK3588_PD_USB>; 24 snps,dis-u2-freeclk-exists-quirk; 25 snps,dis-del-phy-power-chg-quirk; 26 snps,dis-tx-ipgap-linecheck-quirk; [all …]
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| H A D | rk3588-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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| /freebsd/sys/arm64/rockchip/ |
| H A D | rk_grf.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 44 {"rockchip,rk3288-grf", 1}, 45 {"rockchip,rk3328-grf", 1}, 46 {"rockchip,rk3399-grf", 1}, 47 {"rockchip,rk3399-pmugrf", 1}, 48 {"rockchip,rk3568-grf", 1}, 49 {"rockchip,rk3568-pmugrf", 1}, 50 {"rockchip,rk3568-usb2phy-grf", 1}, 51 {"rockchip,rk3566-pipe-grf", 1}, [all …]
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| H A D | rk3568_combphy.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dev/phy/phy.h> 49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h> 57 {"rockchip,rk3568-naneng-combphy", 1}, 163 /* PHY class and methods */ 174 switch (sc->mode) { in rk3568_combphy_enable() 179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable() 183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable() 184 bus_read_4(sc->mem, PHYREG15) | PHYREG15_CTLE_EN); in rk3568_combphy_enable() [all …]
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