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Searched +full:rk3568 +full:- +full:naneng +full:- +full:combphy (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC Naneng Combo Phy
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3528-naneng-combphy
16 - rockchip,rk3562-naneng-combphy
17 - rockchip,rk3568-naneng-combphy
18 - rockchip,rk3576-naneng-combphy
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-naneng-combphy.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/phy/phy.h>
62 /* RK3568 COMBO PHY REG */
214 temp = readl(priv->mmio + reg); in rockchip_combphy_updatel()
216 writel(temp, priv->mmio + reg); in rockchip_combphy_updatel()
224 tmp = en ? reg->enable : reg->disable; in rockchip_combphy_param_write()
225 mask = GENMASK(reg->bitend, reg->bitstart); in rockchip_combphy_param_write()
226 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in rockchip_combphy_param_write()
228 return regmap_write(base, reg->offset, val); in rockchip_combphy_param_write()
233 const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; in rockchip_combphy_is_ready()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk356x-base.dtsi"
9 compatible = "rockchip,rk3568";
11 cpu0_opp_table: opp-table-0 {
12 compatible = "operating-points-v2";
13 opp-shared;
15 opp-408000000 {
16 opp-hz = /bits/ 64 <408000000>;
17 opp-microvolt = <850000 850000 1150000>;
18 clock-latency-ns = <40000>;
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H A Drk356x-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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H A Drk3562.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3562-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rockchip,rk3562-power.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/reset/rockchip,rk3562-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
14 #include <dt-bindings/thermal/thermal.h>
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