Searched +full:rk3399 +full:- +full:pcie +full:- +full:ep (Results 1 – 18 of 18) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | rockchip,rk3399-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip AXI PCIe Endpoint 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-ep.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie-ep 22 reg-names: [all …]
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| H A D | rockchip,rk3399-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip AXI PCIe Root Port Bridge Host 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-host-bridge.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie 22 reg-names: [all …]
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| H A D | rockchip-pcie-ep.txt | 1 * Rockchip AXI PCIe Endpoint Controller DT description 4 - compatible: Should contain "rockchip,rk3399-pcie-ep" 5 - reg: Two register ranges as listed in the reg-names property 6 - reg-names: Must include the following names 7 - "apb-base" 8 - "mem-base" 9 - clocks: Must contain an entry for each entry in clock-names. 10 See ../clocks/clock-bindings.txt for details. 11 - clock-names: Must include the following entries: 12 - "aclk" [all …]
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| H A D | rockchip-pcie-host.txt | 1 * Rockchip AXI PCIe Root Port Bridge DT description 4 - #address-cells: Address representation for root ports, set to <3> 5 - #size-cells: Size representation for root ports, set to <2> 6 - #interrupt-cells: specifies the number of cells needed to encode an 8 - compatible: Should contain "rockchip,rk3399-pcie" 9 - reg: Two register ranges as listed in the reg-names property 10 - reg-names: Must include the following names 11 - "axi-base" 12 - "apb-base" 13 - clocks: Must contain an entry for each entry in clock-names. [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3399-roc-pc-mezzanine.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd 7 /dts-v1/; 8 #include "rk3399-roc-pc.dtsi" 11 model = "Firefly ROC-RK3399-PC Mezzanine Board"; 12 compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399"; 19 poe_12v: poe-12v { 20 compatible = "regulator-fixed"; 21 regulator-name = "poe_12v"; 22 regulator-always-on; [all …]
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| H A D | rk3399pro.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 #include "rk3399.dtsi" 10 /* Default to enabled since AP talk to NPU part over pcie */ 15 /* Default to enabled since AP talk to NPU part over pcie */ 17 ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 18 num-lanes = <4>; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&pcie_clkreqn_cpm>;
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| H A D | rk3399-ficus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 /dts-v1/; 10 #include "rk3399-rock960.dtsi" 13 model = "96boards RK3399 Ficus"; 14 compatible = "vamrs,ficus", "rockchip,rk3399"; 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gma [all...] |
| H A D | rk3399-rock960.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "rk3399-rock960.dtsi" 11 compatible = "vamrs,rock960", "rockchip,rk3399"; 14 stdout-path = "serial2:1500000n8"; 18 compatible = "gpio-leds"; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, 24 user_led1: led-1 { 27 linux,default-trigger = "heartbeat"; [all …]
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| H A D | rk3399-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 15 compatible = "rockchip,rk3399"; 17 interrupt-parent = <&gic>; [all …]
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| H A D | rk3399-rock-pi-4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include "rk3399.dtsi" 11 #include "rk3399-opp.dtsi" 15 compatible = "radxa,rockpi4", "rockchip,rk3399"; 18 stdout-path = "serial2:1500000n8"; 21 clkin_gmac: external-gmac-clock { 22 compatible = "fixed-clock"; [all …]
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| H A D | rk3399-firefly.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include <dt-bindings/usb/pd.h> 11 #include "rk3399.dtsi" 14 model = "Firefly-RK3399 Board"; 15 compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; 25 stdout-path = "serial2:1500000n8"; [all …]
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| H A D | rk3399-kobol-helios64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 13 /dts-v1/; 14 #include "rk3399.dtsi" 18 compatible = "kobol,helios64", "rockchip,rk3399"; 26 avdd_0v9_s0: avdd-0v9-s0 { 27 compatible = "regulator-fixed"; 28 regulator-name = "avdd_0v9_s0"; 29 regulator-always-on; 30 regulator-boot-on; 31 regulator-min-microvolt = <900000>; [all …]
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| H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 9 #include "rk3399-op1.dtsi" 18 stdout-path = "serial2:115200n8"; 27 * - Rails that only connect to the EC (or devices that the EC talks to) 29 * - Rails _are_ included if the rails go to the AP even if the AP 38 * - The EC controls the enable and the EC always enables a rail as 40 * - The rails are actually connected to each other by a jumper and 45 ppvar_sys: ppvar-sys { [all …]
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| H A D | rk3399-rockpro64.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 9 #include "rk3399.dtsi" 20 stdout-path = "serial2:1500000n8"; 25 compatible = "pwm-backlight"; 26 brightness-levels = <0 4 8 16 32 64 128 255>; 27 default-brightness-level = <5>; 32 clkin_gmac: external-gmac-clock { 33 compatible = "fixed-clock"; [all …]
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| H A D | rk3399-gru-scarlet.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-scarlet board device tree source 8 #include "rk3399-gru.dtsi" 11 chassis-type = "tablet"; 16 pp1250_s3: pp1250-s3 { 17 compatible = "regulator-fixed"; 18 regulator-name = "pp1250_s3"; 21 regulator-always-on; 22 regulator-boot-on; 23 regulator-min-microvolt = <1250000>; [all …]
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| /freebsd/sys/arm64/rockchip/ |
| H A D | rk_pcie.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 29 /* Rockchip PCIe controller driver */ 78 #define ATU_OB_REGION_0_SIZE (( ATU_OB_REGIONS - 1) * ATU_OB_REGION_SIZE) 179 #define APB_WR4(_sc, _r, _v) bus_write_4((_sc)->apb_mem_res, (_r), (_v)) 180 #define APB_RD4(_sc, _r) bus_read_4((_sc)->apb_mem_res, (_r)) 240 {"rockchip,rk3399-pcie", 1}, 258 val = bus_read_4(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read() 261 val = bus_read_2(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read() 264 val = bus_read_1(sc->apb_mem_res, base + reg); in rk_pcie_local_cfg_read() [all …]
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| /freebsd/share/misc/ |
| H A D | pci_vendors | 5 # Date: 2025-10-18 03:15:01 8 # the PCI ID Project at https://pci-ids.ucw.cz/. 14 # (version 2 or higher) or the 3-clause BSD License. 25 # device device_name <-- single tab 26 # subvendor subdevice subsystem_name <-- two tabs 30 # This is a relabelled RTL-8139 31 8139 AT-2500TX V3 Ethernet 41 7a09 PCI-to-PCI Bridge 51 7a19 PCI-to-PCI Bridge 57 7a29 PCI-to-PCI Bridge [all …]
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| H A D | usb_vendors | 6 # http://www.linux-usb.org/usb-ids.html 7 # or send entries as patches (diff -u old new) in the 10 # http://www.linux-usb.org/usb.ids 13 # Date: 2025-09-15 20:34:02 20 # device device_name <-- single tab 21 # interface interface_name <-- two tabs 38 5301 GW-US54ZGL 802.11bg 54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211] 64 0200 TP-Link 86 120e ASI120MC-S Planetary Camera [all …]
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