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Searched +full:rk3188 +full:- +full:cru (Results 1 – 25 of 25) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
14 compatible = "rockchip,rk3188";
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
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H A Drk3xxx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/soc/rockchip,boot-mod
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H A Drk3188-bqedison2qc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/i2c/i2c.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "rk3188.dtsi"
14 model = "BQ Edison2 Quad-Core";
15 compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
29 compatible = "pwm-backlight";
30 power-supply = <&vsys>;
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Drockchip,rk3188-cru.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The RK3188/RK3066 clock controller generates and supplies clocks to various
19 preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
20 dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
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H A Drockchip,rk3188-cru.txt1 * Rockchip RK3188/RK3066 Clock and Reset Unit
3 The RK3188/RK3066 clock controller generates and supplies clock to various
9 - compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or
10 "rockchip,rk3066a-cru"
11 - reg: physical base address of the controller and length of memory mapped
13 - #clock-cells: should be 1.
14 - #reset-cells: should be 1.
18 - rockchip,grf: phandle to the syscon managing the "general register files"
23 preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
24 dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
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H A Drockchip,rk3288-cru.txt8 different so another dt-compatible is available. Noticed that it is only
14 - compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in
16 - reg: physical base address of the controller and length of memory mapped
18 - #clock-cells: should be 1.
19 - #reset-cells: should be 1.
23 - rockchip,grf: phandle to the syscon managing the "general register files"
28 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
36 clock-output-names:
37 - "xin24m" - crystal input - required,
38 - "xin32k" - rtc clock - optional,
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Drockchip,emac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC)
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3036-emac
16 - rockchip,rk3066-emac
17 - rockchip,rk3188-emac
28 - description: host clock
29 - description: reference clock
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H A Demac_rockchip.txt1 * ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs
4 - compatible: should be "rockchip,<name>-emac"
5 "rockchip,rk3036-emac": found on RK3036 SoCs
6 "rockchip,rk3066-emac": found on RK3066 SoCs
7 "rockchip,rk3188-emac": found on RK3188 SoCs
8 - reg: Address and length of the register set for the device
9 - interrupts: Should contain the EMAC interrupts
10 - rockchip,grf: phandle to the syscon grf used to control speed and mode
12 - phy: see ethernet.txt file in the same directory.
13 - phy-mode: see ethernet.txt file in the same directory.
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Drockchip-spdif.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Heiko Stuebner <heiko@sntech.de>
20 - cons
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H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
25 - const: rockchip,rk3188-i2c
26 - const: rockchip,rk3228-i2c
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/freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enu
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H A Dpower_domain.txt7 - compatible: Should be one of the following.
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
13 "rockchip,rk3228-power-controller" - for RK3228 SoCs.
14 "rockchip,rk3288-power-controller" - for RK3288 SoCs.
15 "rockchip,rk3328-power-controller" - for RK3328 SoCs.
16 "rockchip,rk3366-power-controller" - for RK3366 SoCs.
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/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Drockchip-efuse.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: spi-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rk3036-spi
24 - const: rockchip,rk3066-spi
25 - const: rockchip,rk3228-spi
26 - const: rockchip,rv1108-spi
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/freebsd/sys/contrib/device-tree/Bindings/power/
H A Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
18 Power domains contained within power-controller node are
20 Documentation/devicetree/bindings/power/power-domain.yaml.
23 "power-domains" property that is a phandle for the
28 const: power-controller
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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Drockchip,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml#
13 - Heiko Stuebner <heiko@sntech.de>
18 - const: rockchip,px30-nfc
19 - const: rockchip,rk2928-nfc
20 - const: rockchip,rv1108-nfc
21 - items:
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Drockchip,rk-timer.txt4 - compatible: should be:
5 "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108
6 "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036
7 "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066
8 "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188
9 "rockchip,rk3228-timer", "rockchip,rk3288-timer": for Rockchip RK3228
10 "rockchip,rk3229-timer", "rockchip,rk3288-timer": for Rockchip RK3229
11 "rockchip,rk3288-timer": for Rockchip RK3288
12 "rockchip,rk3368-timer", "rockchip,rk3288-timer": for Rockchip RK3368
13 "rockchip,rk3399-timer": for Rockchip RK3399
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H A Drockchip,rk-timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
15 - const: rockchip,rk3288-timer
16 - const: rockchip,rk3399-timer
17 - items:
18 - enum:
19 - rockchip,rv1108-timer
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dpwm-rockchip.txt4 - compatible: should be "rockchip,<name>-pwm"
5 "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
6 "rockchip,rk3288-pwm": found on RK3288 SOC
7 "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
8 "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
9 - reg: physical base address and length of the controller's registers
10 - clocks: See ../clock/clock-bindings.txt
11 - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
12 - There is one clock that's used both to derive the functional clock
14 - For newer hardware (rk3328 and future socs): specified by name
[all …]
H A Dpwm-rockchip.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - cons
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/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/
H A Drockchip-vop.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Sandy Huang <hjc@rock-chip
[all...]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Drockchip-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Drk3066a-cru.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 #include <dt-bindings/clock/rk3188-cru-common.h>
12 /* soft-reset indices */
H A Drk3188-cru.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 #include <dt-bindings/clock/rk3188-cru-common.h>
12 /* soft-reset indices */