Searched +full:rk3066 +full:- +full:smp (Results 1 – 7 of 7) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-or-later9 #include <linux/smp.h>57 np = dev->of_node; in rockchip_get_core_reset()92 ret = -1; in pmu_set_power_domain()122 return -ENXIO; in rockchip_boot_secondary()128 return -ENXIO; in rockchip_boot_secondary()159 * rockchip_smp_prepare_sram - populate necessary sram block160 * Starting cores execute the code residing at the start of the on-chip sram161 * after power-on. Therefore make sure, this sram region is reserved and163 * core to the real startup code in ram into the sram-region.[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/pinctrl/rockchip.h>9 #include <dt-bindings/clock/rk3066a-cru.h>10 #include <dt-bindings/power/rk3066-power.h>22 #address-cells = <1>;23 #size-cells = <0>;24 enable-method = "rockchip,rk3066-smp";28 compatible = "arm,cortex-a9";29 next-level-cache = <&L2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/pinctrl/rockchip.h>9 #include <dt-bindings/clock/rk3188-cru.h>10 #include <dt-bindings/power/rk3188-power.h>17 #address-cells = <1>;18 #size-cells = <0>;19 enable-method = "rockchip,rk3066-smp";23 compatible = "arm,cortex-a9";24 next-level-cache = <&L2>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/clock/rk3128-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/rk3128-power.h>15 interrupt-parent = <&gic>;16 #address-cells = <1>;17 #size-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 #include <dt-bindings/gpio/gpio.h>4 #include <dt-bindings/interrupt-controller/irq.h>5 #include <dt-bindings/interrupt-controller/arm-gic.h>6 #include <dt-bindings/pinctrl/rockchip.h>7 #include <dt-bindings/clock/rk3036-cru.h>8 #include <dt-bindings/soc/rockchip,boot-mode.h>9 #include <dt-bindings/power/rk3036-power.h>12 #address-cells = <1>;13 #size-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 #include <dt-bindings/gpio/gpio.h>4 #include <dt-bindings/interrupt-controller/irq.h>5 #include <dt-bindings/interrupt-controller/arm-gic.h>6 #include <dt-bindings/pinctrl/rockchip.h>7 #include <dt-bindings/clock/rk3288-cru.h>8 #include <dt-bindings/power/rk3288-power.h>9 #include <dt-bindings/thermal/thermal.h>10 #include <dt-bindings/soc/rockchip,boot-mode.h>13 #address-cells = <2>;[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>21 with updates for 32-bit and 64-bit ARM systems provided in this document.30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in57 On 32-bit ARM v7 or later systems this property is required and matches64 On ARM v8 64-bit systems this property is required and matches the67 * If cpus node's #address-cells property is set to 275 * If cpus node's #address-cells property is set to 1[all …]