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Searched +full:rk3036 +full:- +full:power (Results 1 – 16 of 16) sorted by relevance

/linux/arch/arm/boot/dts/rockchip/
H A Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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H A Drk3036-kylin.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3036.dtsi"
8 model = "Rockchip RK3036 KylinBoard";
9 compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
18 stdout-path = "serial2:115200n8";
26 hdmi_con: hdmi-con {
27 compatible = "hdmi-connector";
32 remote-endpoint = <&hdmi_out_con>;
37 leds: gpio-leds {
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H A Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3128-power.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
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/linux/Documentation/devicetree/bindings/mtd/
H A Drockchip,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml#
13 - Heiko Stuebner <heiko@sntech.de>
18 - const: rockchip,px30-nfc
19 - const: rockchip,rk2928-nfc
20 - const: rockchip,rv1108-nfc
21 - items:
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/linux/Documentation/devicetree/bindings/power/
H A Drockchip,power-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Power Domains
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 Rockchip processors include support for multiple power domains
16 application scenarios to save power.
18 Power domains contained within power-controller node are
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/linux/Documentation/devicetree/bindings/phy/
H A Drockchip,inno-usb2phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-usb2phy
16 - rockchip,rk3036-usb2phy
17 - rockchip,rk3128-usb2phy
18 - rockchip,rk3228-usb2phy
19 - rockchip,rk3308-usb2phy
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/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3528-ioc-grf
19 - rockchip,rk3528-pipe-phy-grf
20 - rockchip,rk3528-vo-grf
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/linux/Documentation/devicetree/bindings/sound/
H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-rk3x.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Heiko Stuebner <heiko@sntech.de>
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
25 - const: rockchip,rk3188-i2c
26 - const: rockchip,rk3228-i2c
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/linux/sound/soc/codecs/
H A Dinno_rk3036.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Driver of Inno Codec for rk3036 by Rockchip Inc.
5 * Author: Zheng ShunQian<zhengsq@rock-chips.com>
29 #define INNO_R00_PRB_DISABLE (0x0 << 6) /*power reset bypass*/
90 /* Gain of output, 1.5db step: -39db(0x0) ~ 0db(0x1a) ~ 6db(0x1f) */
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 # setting - SPI can't be modular so that case doesn't need to be covered.
498 tristate "Analog Devices AU1761 CODEC - I2C"
504 tristate "Analog Devices AU1761 CODEC - SPI"
541 tristate "Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter"
547 tristate "Analog Devices ADAU7118 8 Channel PDM-t
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/linux/Documentation/devicetree/bindings/serial/
H A Dsnps-dw-apb-uart.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: serial.yaml#
14 - $ref: rs485.yaml#
16 - if:
20 - {}
21 - const: renesas,rzn1-uart
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/linux/Documentation/devicetree/bindings/usb/
H A Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
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/linux/arch/arm/mach-rockchip/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
57 np = dev->of_node; in rockchip_get_core_reset()
77 * We need to soft reset the cpu when we turn off the cpu power domain, in pmu_set_power_domain()
87 pr_err("%s: could not update power domain\n", in pmu_set_power_domain()
92 ret = -1; in pmu_set_power_domain()
96 pr_err("%s: could not read power domain state\n", in pmu_set_power_domain()
122 return -ENXIO; in rockchip_boot_secondary()
128 return -ENXIO; in rockchip_boot_secondary()
159 * rockchip_smp_prepare_sram - populate necessary sram block
160 * Starting cores execute the code residing at the start of the on-chip sram
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/linux/drivers/clk/rockchip/
H A Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Author: Xing Zheng <zhengxing@rock-chips.com>
14 #include <linux/clk-provider.h>
53 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_get_pll_settings()
56 for (i = 0; i < pll->rate_count; i++) { in rockchip_get_pll_settings()
68 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_pll_determine_rate()
72 for (i = 0; i < pll->rate_count; i++) { in rockchip_pll_determine_rate()
73 if (req->rate >= rate_table[i].rate) { in rockchip_pll_determine_rate()
74 req->rate = rate_table[i].rate; in rockchip_pll_determine_rate()
81 req->rate = rate_table[i - 1].rate; in rockchip_pll_determine_rate()
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/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-usb2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
11 #include <linux/extcon-provider.h>
50 * enum usb_chg_state - Different states involved in USB charger detection.
89 * struct rockchip_chg_det_reg - usb charger detect registers
115 * struct rockchip_usb2phy_port_cfg - usb-phy port configuration.
169 * struct rockchip_usb2phy_cfg - usb-phy configuration.
170 * @reg: the address offset of grf for usb-phy config.
174 * @port_cfgs: usb-phy port configurations.
187 * struct rockchip_usb2phy_port - usb-phy port data.
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