| /freebsd/sys/contrib/device-tree/Bindings/riscv/ |
| H A D | extensions.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/riscv/extensions.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V ISA extensions
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 RISC-V has a large number of extensions, some of which are "standard"
16 extensions, meaning they are ratified by RISC-V International, and others
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| /freebsd/contrib/llvm-project/clang/lib/Basic/Targets/ |
| H A D | RISCV.cpp | 1 //===--- RISCV.cpp - Implement RISC-V target feature support --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements RISC-V TargetInfo objects.
11 //===----------------------------------------------------------------------===//
13 #include "RISCV.h"
26 // clang-format off in getGCCRegNames()
49 // clang-format on in getGCCRegNames()
80 // A 12-bit signed immediate. in validateAsmConstraint()
81 Info.setRequiresImmediate(-2048, 2047); in validateAsmConstraint()
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| /freebsd/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | RISCV.cpp | 1 //===- RISCV.cpp ----------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
30 class RISCV final : public TargetInfo { class
32 RISCV();
99 return (v & ((1ULL << (begin + 1)) - 1)) >> end; in extractBits()
110 RISCV::RISCV() { in RISCV() function in RISCV
115 if (config->is64) { in RISCV()
141 if (config->is64) in getEFlags()
142 return cast<ObjFile<ELF64LE>>(f)->getObj().getHeader().e_flags; in getEFlags()
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| H A D | LoongArch.cpp | 1 //===- LoongArch.cpp ------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
75 // produces a PC-relative intermediate value with the lowest 12 bits zeroed (the
80 // Here a "page" is in fact just another way to refer to the 12-bit range
95 // (lu32i.d and lu52i.d). Compensate all the sign-extensions is a bit in getLoongArchPageDelta()
103 pcalau12i_pc = pc - 8; in getLoongArchPageDelta()
109 pcalau12i_pc = pc - 12; in getLoongArchPageDelta()
115 uint64_t result = getLoongArchPage(dest) - getLoongArchPage(pcalau12i_pc); in getLoongArchPageDelta()
117 result += 0x1000 - 0x1'0000'0000; in getLoongArchPageDelta()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1 //===-- RISCVISelLowering.cpp - RISC-V DAG Lowering Implementation ------
6143 for (unsigned j = 0; j != Op.getNumOperands(); ++j) { SplitVectorOp() local
6169 for (unsigned j = 0; j != Op.getNumOperands(); ++j) { SplitVPOp() local
6221 for (unsigned j = 0; j != Op.getNumOperands(); ++j) { SplitStrictFPVectorOp() local
19963 for (unsigned i = 0, j = 0, e = ArgLocs.size(), OutIdx = 0; i != e; LowerCall() local
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| H A D | RISCVInstrInfo.cpp | 1 //===-- RISCVInstrInfo.cpp - RISC-V Instruction Information -----*-
70 namespace llvm::RISCV { global() namespace
943 for (auto J = I.getReverse(); J != MBB.rend() && isUnpredicatedTerminator(*J); analyzeBranch() local
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| H A D | RISCVInstrInfo.td | 1 //===-- RISCVInstrInfo.td - Target Description for RISC-V --*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file describes the RISC-V instructions in TableGen format.
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
14 // RISC-V specific DAG Nodes.
15 //===----------------------------------------------------------------------===//
17 // Target-independent type requirements, but with target-specific formats.
23 // Target-dependent type requirements.
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 1 //===-- RISCVAsmParser.cpp - Parse RISC-V assembly to MCInst instructions -===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
47 #define DEBUG_TYPE "riscv-asm-parser"
50 "Number of RISC-V Compressed instructions emitted");
52 static cl::opt<bool> AddBuildAttributes("riscv-add-build-attributes",
56 extern const SubtargetFeatureKV RISCVFeatureKV[RISCV::NumSubtargetFeatures];
85 bool isRV64() const { return getSTI().hasFeature(RISCV::Feature64Bit); } in isRV64()
86 bool isRVE() const { return getSTI().hasFeature(RISCV::FeatureStdExtE); } in isRVE()
88 return getSTI().hasFeature(RISCV::Experimental); in enableExperimentalExtension()
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| /freebsd/crypto/openssl/crypto/modes/asm/ |
| H A D | aes-gcm-riscv64-zvkb-zvkg-zvkned.pl | 2 # This file is dual-licensed, meaning that you can use it under your
37 # - RV64I
38 # - RISC-V Vector ('V') with VLEN >= 128
39 # - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
40 # - RISC-V Vector GCM/GMAC extension ('Zvkg')
41 # - RISC-V Vector AES Block Cipher extension ('Zvkned')
42 # - RISC-V Zicclsm(Main memory supports misaligned loads/stores)
44 # Reference: https://github.com/riscv/riscv-crypto/issues/192#issuecomment-1270447575
65 use riscv;
67 # $output is the last argument if it looks like a file (it has an extension)
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| /freebsd/crypto/openssl/crypto/aes/asm/ |
| H A D | aes-riscv64-zvkb-zvkned.pl | 2 # This file is dual-licensed, meaning that you can use it under your
37 # - RV64I
38 # - RISC-V Vector ('V') with VLEN >= 128
39 # - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
40 # - RISC-V Vector AES block cipher extension ('Zvkned')
41 # - RISC-V Zicclsm(Main memory supports misaligned loads/stores)
49 use riscv;
51 # $output is the last argument if it looks like a file (it has an extension)
84 # The mask pattern for 4*N-th elements
93 # v31:[IV0, IV1, IV2, big-endian count]
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| H A D | aes-riscv64-zvbb-zvkg-zvkned.pl | 2 # This file is dual-licensed, meaning that you can use it under your
37 # - RV64I
38 # - RISC-V Vector ('V') with VLEN >= 128
39 # - RISC-V Vector Bit-manipulation extension ('Zvbb')
40 # - RISC-V Vector GCM/GMAC extension ('Zvkg')
41 # - RISC-V Vector AES block cipher extension ('Zvkned')
42 # - RISC-V Zicclsm(Main memory supports misaligned loads/stores)
50 use riscv;
52 # $output is the last argument if it looks like a file (it has an extension)
90 addi $T0, $T0, -1
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| H A D | aes-riscv64-zkn.pl | 2 # This file is dual-licensed, meaning that you can use it under your
5 # Copyright 2022-2023 The OpenSSL Project Authors. All Rights Reserved.
43 use riscv;
45 # $output is the last argument if it looks like a file (it has an extension)
57 # Callee-saved registers
59 # Caller-saved registers
82 $ret.=" addi sp,sp,-$stack_reservation\n";
84 $stack_offset -= 8;
97 $stack_offset -= 8;
112 # Registers to hold AES state (called s0-s3 or y0-y3 elsewhere)
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| H A D | aes-riscv64-zvkned.pl | 2 # This file is dual-licensed, meaning that you can use it under your
38 # - RV64I
39 # - RISC-V Vector ('V') with VLEN >= 128
40 # - RISC-V Vector AES block cipher extension ('Zvkned')
48 use riscv;
50 # $output is the last argument if it looks like a file (it has an extension)
67 # Load all 11 round keys to v1-v11 registers.
99 # Load all 13 round keys to v1-v13 registers.
135 # Load all 15 round keys to v1-v15 registers.
175 # aes-128 encryption with round keys v1-v11
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| /freebsd/contrib/xz/src/liblzma/simple/ |
| H A D | riscv.c | 1 // SPDX-License-Identifier: 0BSD
5 /// \file riscv.c
6 /// \brief Filter for 32-bit/64-bit little/big endian RISC-V binaries
14 /// meaning it will convert any paired instruction that is not a 16-bit
23 // - Chien Wong <m@xv97.com> provided a few early versions of RISC-V
26 // - Igor Pavlov helped a lot in the filter design, getting it both
34 RISC-V filtering
45 (pc-relative) behavior:
48 ---
60 to non-code data, only the JAL instructions that use x1 or x5
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| /freebsd/contrib/llvm-project/lld/ELF/ |
| H A D | Relocations.cpp | 1 //===- Relocations.cpp ----------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains platform-independent functions to process relocations.
28 // - create GOT/PLT entries
29 // - create new relocations in .dynsym to let the dynamic linker resolve
31 // relocations can be resolved at link-time)
32 // - create COPY relocs and reserve space in .bss
33 // - replace expensive relocs (in terms of runtime cost) with cheap ones
34 // - error out infeasible combinations such as PIC and non-relative relocs
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| H A D | Driver.cpp | 1 //===- Driver.cpp ---------------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 // be harmful when you are doing cross-linking. Therefore, in LLD, we
23 //===----------------------------------------------------------------------===//
53 #include "llvm/Config/llvm-config.h"
88 if (config->noinhibitExec) in errorOrWarn()
130 // This driver-specific context will be freed later by unsafeLldMain(). in link()
133 ctx->e.initialize(stdoutOS, stderrOS, exitEarly, disableOutput); in link()
134 ctx->e.cleanupCallback = []() { in link()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 1 //===---- CGBuiltin.cpp - Emit LLVM Code for builtins ---------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
93 I->addAnnotationMetadata("auto-init"); in initializeAlloca()
96 /// getBuiltinLibFunction - Given a builtin id for a function like
106 // TODO: This list should be expanded or refactored after all GCC-compatible in getBuiltinLibFunction()
134 // The AIX library functions frexpl, ldexpl, and modfl are for 128-bit in getBuiltinLibFunction()
136 // if it is 64-bit 'long double' mode. in getBuiltinLibFunction()
146 if (FD->hasAttr<AsmLabelAttr>()) in getBuiltinLibFunction()
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| /freebsd/contrib/llvm-project/clang/lib/Driver/ToolChains/ |
| H A D | Clang.cpp | 1 //===-- Clang.cpp - Clang+LLVM ToolChain Implementations --------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
18 #include "Arch/RISCV.h"
47 #include "llvm/Config/llvm-config.h"
81 << A->getBaseArg().getAsString(Args) in CheckPreprocessingOptions()
82 << (D.IsCLMode() ? "/E, /P or /EP" : "-E"); in CheckPreprocessingOptions()
92 D.Diag(diag::err_drv_argument_not_allowed_with) << A->getAsString(Args) in CheckCodeGenerationOptions()
93 << "-static"; in CheckCodeGenerationOptions()
97 // This is used for the space-separated argument list specified with
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | AttrDocs.td | 1 //==--- AttrDocs.td - Attribute documentation ----------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===---------------------------------------------------------------------===//
9 // To test that the documentation builds cleanly, you must run clang-tblgen to
15 // To run clang-tblgen to generate the .rst file:
16 // clang-tblgen -gen-attr-docs -I <root>/llvm/tools/clang/include
17 // <root>/llvm/tools/clang/include/clang/Basic/Attr.td -o
20 // To run sphinx to generate the .html files (note that sphinx-build must be
24 // Non-Windows (from within the clang\docs directory):
25 // sphinx-build -b html _build/html
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| /freebsd/contrib/llvm-project/clang/lib/Driver/ |
| H A D | Driver.cpp | 1 //===--- Driver.cpp - Clang GCC Compatible Driver ------
4979 for (auto &J : C.getJobs()) BuildJobs() local
5053 __anon17dcc6010d02(auto &J) BuildJobs() argument
5791 const char *Extension = types::getTypeTempSuffix(FileType, true); MakeCLOutputFilename() local
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| /freebsd/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaDecl.cpp | 1 //===--- SemaDecl.cpp - Semantic Analysis for Declarations ----------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
96 if (!AllowInvalidDecl && ND->isInvalidDecl()) in ValidateCandidate()
109 // An injected-class-name of a class template (specialization) is valid in ValidateCandidate()
110 // as a template or as a non-template. in ValidateCandidate()
113 if (!RD || !RD->isInjectedClassName()) in ValidateCandidate()
115 RD = cast<CXXRecordDecl>(RD->getDeclContext()); in ValidateCandidate()
116 return RD->getDescribedClassTemplate() || in ValidateCandidate()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ItaniumMangle.cpp | 1 //===--- ItaniumMangle.cpp - Itanium C++ Name Mangling ----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 // ABI-compatible with GCC):
13 // http://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling
15 //===----------------------------------------------------------------------===//
51 if (const FunctionTemplateDecl *ftd = fn->getPrimaryTemplate()) in getStructor()
52 return ftd->getTemplatedDecl(); in getStructor()
67 return Record->isLambda(); in isLambda()
146 if (Tag->getName().empty() && !Tag->getTypedefNameForAnonDecl()) in getNextDiscriminator()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 1 //===- SelectionDAG.cpp - Implement the SelectionDAG data structures ------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
87 /// makeVTList - Return an instance of the SDVTList struct initialized with the
104 static cl::opt<bool> EnableMemCpyDAGOpt("enable-memcpy-dag-opt",
108 static cl::opt<int> MaxLdStGlue("ldstmemcpy-glue-max",
113 LLVM_DEBUG(dbgs() << Msg; V.getNode()->dump(G);); in NewSDValueDbgMsg()
116 //===----------------------------------------------------------------------===//
118 //===----------------------------------------------------------------------===//
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| /freebsd/sys/riscv/riscv/ |
| H A D | pmap.c | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
12 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
18 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com>
30 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
64 /*-
71 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
101 * this module may throw away valid virtual-to-physical
103 * of virtual-to-physical mappings must be done as
107 * make virtual-to-physical map invalidates expensive,
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| /freebsd/contrib/llvm-project/clang/include/clang/Driver/ |
| H A D | Options.td | 1 //===--- Options.td - Options for clang -----------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
38 // The option is a "driver"-only option, and should not be forwarded to other
39 // tools via `-Xarch` options.
42 // LinkerInput - The option is a linker input.
45 // NoArgumentUnused - Don't report argument unused warnings for this option; this
46 // is useful for options like -static or -dynamic which a user may always end up
50 // Unsupported - The option is unsupported, and the driver will reject command
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