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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Drenesas,riic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Wolfram Sang <wsa+renesas@sang-engineering.com>
16 - items:
17 - enum:
18 - renesas,riic-r7s72100 # RZ/A1H
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H A Drenesas,riic.txt1 Device tree configuration for Renesas RIIC driver
4 - compatible :
5 "renesas,riic-r7s72100" if the device is a part of a R7S72100 SoC.
6 "renesas,riic-r7s9210" if the device is a part of a R7S9210 SoC.
7 "renesas,riic-rz" for a generic RZ/A compatible device.
8 - reg : address start and address range size of device
9 - interrupts : 8 interrupts (TEI, RI, TI, SPI, STI, NAKI, ALI, TMOI)
10 - clock-frequency : frequency of bus clock in Hz
11 - #address-cells : should be <1>
12 - #size-cells : should be <0>
[all …]
/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr7s9210.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
23 clock-frequency = <0>;
27 #clock-cells = <0>;
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H A Dr7s72100.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <dt-bindings/clock/r7s72100-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
32 #clock-cells = <0>;
33 compatible = "fixed-factor-clock";
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H A Dr7s72100-rskrza1.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the RZ/A1H RSK board
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
24 stdout-path = "serial0:115200n8";
33 compatible = "mtd-rom";
36 power-domains = <&cpg_clocks>;
37 bank-width = <4>;
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr9a07g043.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/Five and RZ/G2UL SoCs
8 #include <dt-bindings/clock/r9a07g043-cpg.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 audio_clk1: audio1-clk {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
19 clock-frequency = <0>;
22 audio_clk2: audio2-clk {
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H A Dr9a08g045.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G3S SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a08g045-cpg.h>
10 #include <dt-bindings/clock/renesas,r9a08g045-vbattb.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 audio_clk1: audio1-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
H A Dr9a07g044.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2L and RZ/G2LC common SoC parts
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
[all …]
H A Dr9a07g054.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/V2L SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
[all …]
H A Dr9a09g056.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/V2N SoC
8 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
31 #address-cells = <2>;
32 #size-cells = <2>;
34 audio_extal_clk: audio-clk {
35 compatible = "fixed-clock";
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H A Dr9a09g047.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G3E SoC
8 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
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H A Dr9a09g057.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/V2H(P) SoC
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
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