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/freebsd/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dshared-dma-pool.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/shared-dma-pool.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: /reserved-memory DMA pool
10 - devicetree-spec@vger.kernel.org
13 - $ref: reserved-memory.yaml
18 - const: shared-dma-pool
21 pool of DMA buffers for a set of devices. It can be used by an
22 operating system to instantiate the necessary pool management
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/freebsd/sys/dev/dpaa2/
H A Ddpaa2_channel.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
82 #define RX_SEG_SZ (((MJUM9BYTES - 1) / PAGE_SIZE + 1) * PAGE_SIZE)
83 #define RX_SEG_MAXSZ (((MJUM9BYTES - 1) / PAGE_SIZE + 1) * PAGE_SIZE)
87 #define TX_SEG_N (16u) /* XXX-DSL: does DPAA2 limit exist? */
128 error = DPAA2_CMD_RC_OPEN(dev, child, &cmd, rcinfo->id, &rctk); in dpaa2_chan_setup()
131 __func__, rcinfo->id, error); in dpaa2_chan_setup()
134 error = DPAA2_CMD_CON_OPEN(dev, child, &cmd, coninfo->id, &contk); in dpaa2_chan_setup()
137 __func__, coninfo->id, error); in dpaa2_chan_setup()
144 "chan_id=%d\n", __func__, coninfo->id, consc->attr.chan_id); in dpaa2_chan_setup()
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H A Ddpaa2_ni.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
35 * high-functioning network interface. The DPNI supports features that are
112 mtx_assert(&(__sc)->lock, MA_NOTOWNED); \
113 mtx_lock(&(__sc)->lock); \
116 mtx_assert(&(__sc)->lock, MA_OWNED); \
117 mtx_unlock(&(__sc)->lock); \
120 mtx_assert(&(__sc)->lock, MA_OWNED); \
124 (&(sc)->channels[(chan)]->txc_queue.tx_rings[(tc)])
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/freebsd/sys/dev/drm2/ttm/
H A Dttm_page_alloc_dma.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
27 * A simple DMA pool losely based on dmapool.c. It has certain advantages
28 * over the DMA pools:
29 * - Pool collects resently freed pages for reuse (and hooks up to
31 * - Tracks currently in use pages
32 * - Tracks whether the page is UC, WB or cached (and reverts to WB
39 #include <linux/dma-mapping.h>
77 * The pool structure. There are usually six pools:
78 * - generic (not restricted to DMA32):
79 * - write combined, uncached, cached.
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/freebsd/tools/tools/sysdoc/
H A Dtunables.mdoc1 ---
9 ---
17 ---
23 ---
27 Displays nchash chain lengths. This is a read-only
30 ---
33 ---
41 ---
47 ---
54 ---
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
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/freebsd/sys/dev/bxe/
H A Dbxe.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved.
64 * FLR Support - bxe_pf_flr_clnup() is called during nic_load in the per
241 static int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
253 /* Interrupt Mode: 0 (IRQ), 1 (MSI/IRQ), and 2 (MSI-X/MSI/IRQ) */
256 &bxe_interrupt_mode, 0, "Interrupt (MSI-X/MSI/INTx) mode");
261 &bxe_queue_count, 0, "Multi-Queue queue count");
288 /* PCI MRRS: -1 (Auto), 0 (128B), 1 (256B), 2 (512B), 3 (1KB) */
289 static int bxe_mrrs = -1;
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/freebsd/sys/dev/ocs_fc/
H A Dsli4.c1 /*-
33 * @defgroup sli SLI-4 Base APIs
38 * All common (i.e. transport-independent) SLI-4 functions are implemented
113 * Although SLI-4 specification defines a common set of registers, their locations
260 const sli4_reg_t *r = &(regmap[reg][sli->if_type]); in sli_reg_read()
262 if ((UINT32_MAX == r->rset) || (UINT32_MAX == r->off)) { in sli_reg_read()
263 ocs_log_err(sli->os, "regname %d not defined for if_type %d\n", reg, sli->if_type); in sli_reg_read()
267 return ocs_reg_read32(sli->os, r->rset, r->off); in sli_reg_read()
282 const sli4_reg_t *r = &(regmap[reg][sli->if_type]); in sli_reg_write()
284 if ((UINT32_MAX == r->rset) || (UINT32_MAX == r->off)) { in sli_reg_write()
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/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb.c1 /*-
2 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
39 * a BHND-compatible bus (e.g. bcma or siba).
172 (unsigned long long) sc->chipid.enum_addr); in bhndb_child_location()
188 for (u_int i = 0; i < hw->num_hw_reqs; i++) { in bhndb_hw_matches()
192 match = &hw->hw_reqs[i]; in bhndb_hw_matches()
198 if (BHNDB_IS_CORE_DISABLED(sc->dev, sc->bus_dev, core)) in bhndb_hw_matches()
225 * priorities of per-core port resources.
255 for (regw = br->cfg->register_windows; in bhndb_init_region_cfg()
256 regw->win_type != BHNDB_REGWIN_T_INVALID; regw++) in bhndb_init_region_cfg()
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/freebsd/sys/dev/sfxge/common/
H A Defx_regs_mcdi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
32 /* Power-on reset state */
54 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
57 /* The rest of these are firmware-defined */
65 /* Values to be written to the per-port status dword in shared
94 * | | \--- Response
95 * | \------- Error
96 * \------------------------------ Resync (always set)
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/freebsd/contrib/one-true-awk/testdir/
H A Dfunstack.in2 %%% BibTeX-file{
23 %%% (incompletely) 1970 -- 1979.
50 %%% covering 1958--1996 became too large (about
65 %%% Algorithms 1--492. For Algorithms 493--686,
72 %%% cross-referenced in both directions, so
75 %%% Corrigenda. Cross-referenced entries are
77 %%% that each is completely self-contained.
83 %%% ftp://netlib.bell-labs.com/netlib/toms.
88 %%% http://ciir.cs.umass.edu/cgi-bin/web_query_form/public/cacm2.1.
90 %%% The initial draft of entries for 1981 --
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/freebsd/sys/contrib/dev/acpica/
H A Dchanges.txt1 ----------------------------------------
6 Added option to skip the global lock for SMM - Huacai Chen
8 Fixed non-NUL terminated string implementations - Ahmed Salem
10 Fixed CCEL and CDAT templates - Ahmed Salem
12 …ethod parameters (definition) vs arguments (invocation) in different places - Peter Williams, Hans…
14 Define distinct D3 states (D3Hot and D3Cold) that help clarify the device behavior support - Aymeri…
19 ----------------------------------------
26 Add complete support for 3 new ACPI tables - MRRM,ERDT and RIMT (Tony Luck & V L Sunil)
32 A few fixes including local cache allocation, FFixedHW Region, attribute packing, string vs. non-st…
35 ----------------------------------------
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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