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/freebsd/sys/contrib/device-tree/Bindings/power/reset/
H A Dgpio-restart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpi
[all...]
H A Dgpio-restart.txt4 This binding supports level and edge triggered reset. At driver load
6 handler. If the optional properties 'open-source' is not found, the GPIO line
12 triggering a level triggered reset condition. This will also cause an
13 inactive->active edge condition, triggering positive edge triggered
14 reset. After a delay specified by active-delay, the GPIO is set to
15 inactive, thus causing an active->inactive edge, triggering negative edge
16 triggered reset. After a delay specified by inactive-delay, the GPIO
17 is driven active again. After a delay specified by wait-delay, the
21 - compatible : should be "gpio-restart".
22 - gpios : The GPIO to set high/low, see "gpios property" in
[all …]
H A Dgpio-poweroff.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpi
[all...]
H A Dltc2952-poweroff.txt4 been sent, the chip's watchdog has to be reset to gracefully shut down.
9 - compatible: Must contain: "lltc,ltc2952"
10 - watchdog-gpios: phandle + gpio-specifier for the GPIO connected to the
12 - kill-gpios: phandle + gpio-specifier for the GPIO connected to the
16 - trigger-gpios: phandle + gpio-specifier for the GPIO connected to the
20 - trigger-delay-ms The number of milliseconds to wait after trigger line
22 The default is 2500ms.
29 trigger-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
30 trigger-delay-ms = <2000>;
31 watchdog-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dsamsung,s6e8aa0.txt4 - compatible: "samsung,s6e8aa0"
5 - reg: the virtual channel number of a DSI peripheral
6 - vdd3-supply: core voltage supply
7 - vci-supply: voltage supply for analog circuits
8 - reset-gpios: a GPIO spec for the reset pin
9 - display-timings: timings for the connected panel as described by [1]
12 - power-on-delay: delay after turning regulators on [ms]
13 - reset-delay: delay after reset sequence [ms]
14 - init-delay: delay after initialization sequence [ms]
15 - panel-width-mm: physical panel width [mm]
[all …]
H A Dsamsung,s6e8aa0.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrzej Hajda <a.hajda@samsung.com>
13 - $ref: panel-common.yaml#
20 reset-gpios: true
21 display-timings: true
23 vdd3-supply:
26 vci-supply:
29 power-on-delay:
[all …]
H A Dsamsung,ld9040.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrzej Hajda <a.hajda@samsung.com>
13 - $ref: panel-common.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
20 display-timings: true
23 reset-gpios: true
25 vdd3-supply:
28 vci-supply:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dnvidia,tegra20-kbc.txt7 - compatible: "nvidia,tegra20-kbc"
8 - reg: Register base address of KBC.
9 - interrupts: Interrupt number for the KBC.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
14 - linux,keymap: The keymap for keys as described in the binding document
15 devicetree/bindings/input/matrix-keymap.txt.
16 - clocks: Must contain one entry, for the module clock.
17 See ../clocks/clock-bindings.txt for details.
18 - resets: Must contain an entry for each entry in reset-names.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-pwrseq-simple.txt8 - compatible : contains "mmc-pwrseq-simple".
11 - reset-gpios : contains a list of GPIO specifiers. The reset GPIOs are asserted
13 They will be de-asserted right after the power has been provided to the
15 - clocks : Must contain an entry for the entry in clock-names.
16 See ../clocks/clock-bindings.txt for details.
17 - clock-names : Must include the following entry:
19 - post-power-on-delay-ms : Delay in ms after powering the card and
20 de-asserting the reset-gpios (if any)
21 - power-off-delay-us : Delay in us after asserting the reset-gpios (if any)
27 compatible = "mmc-pwrseq-simple";
[all …]
H A Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
26 contains a list of GPIO specifiers. The reset GPIOs are asserted
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcs35l33.txt5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
28 On power down, it affects the time from when the power-down sequence
[all …]
H A Dcs35l36.txt5 - compatible : "cirrus,cs35l36"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost
18 - cirrus,boost-pea
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl-fec.txt4 - compatible : Should be "fsl,<soc>-fec"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain fec interrupt
7 - phy-mode : See ethernet.txt file in the same directory
10 - phy-supply : regulator that powers the Ethernet PHY.
11 - phy-handle : phandle to the PHY device connected to this device.
12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13 Use instead of phy-handle.
14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
17 - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
[all …]
H A Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NX
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmi
[all...]
H A Drohm,bd71837-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
35 clock-names:
38 "#clock-cells":
[all …]
/freebsd/sys/dev/etherswitch/ar40xx/
H A Dar40xx_hw_psgmii.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
76 * Routines that control the ess-psgmii block - the interconnect
77 * between the ess-switch and the external multi-port PHY
85 bus_space_write_4(sc->sc_psgmii_mem_tag, sc->sc_psgmii_mem_handle, in ar40xx_hw_psgmii_reg_write()
87 bus_space_barrier(sc->sc_psgmii_mem_tag, sc->sc_psgmii_mem_handle, in ar40xx_hw_psgmii_reg_write()
88 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_WRITE); in ar40xx_hw_psgmii_reg_write()
96 bus_space_barrier(sc->sc_psgmii_mem_tag, sc->sc_psgmii_mem_handle, in ar40xx_hw_psgmii_reg_read()
97 0, sc->sc_psgmii_mem_size, BUS_SPACE_BARRIER_READ); in ar40xx_hw_psgmii_reg_read()
98 ret = bus_space_read_4(sc->sc_psgmii_mem_tag, sc->sc_psgmii_mem_handle, in ar40xx_hw_psgmii_reg_read()
[all …]
H A Dar40xx_hw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
81 * Reset the ESS switch. This also resets the ESS ethernet
91 ret = hwreset_assert(sc->sc_ess_rst); in ar40xx_hw_ess_reset()
93 device_printf(sc->sc_dev, "ERROR: failed to assert reset\n"); in ar40xx_hw_ess_reset()
96 DELAY(10*1000); in ar40xx_hw_ess_reset()
98 ret = hwreset_deassert(sc->sc_ess_rst); in ar40xx_hw_ess_reset()
100 device_printf(sc->sc_dev, in ar40xx_hw_ess_reset()
101 "ERROR: failed to deassert reset\n"); in ar40xx_hw_ess_reset()
105 DELAY(10*1000); in ar40xx_hw_ess_reset()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dusb251xb.txt1 Microchip USB 2.0 Hi-Speed Hub Controller
4 Hi-Speed Controller.
7 - compatible : Should be "microchip,usb251xb" or one of the specific types:
11 - reg : I2C address on the selected bus (default is <0x2C>)
14 - reset-gpios : Should specify the gpio for hub reset
15 - vdd-supply : Should specify the phandle to the regulator supplying vdd
16 - skip-config : Skip Hub configuration, but only send the USB-Attach command
17 - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
18 - product-id : Set USB Product ID of the hub (16 bit, default depends on type)
19 - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h5-nanopi-neo-plus2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
6 #include "sun50i-h5.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/pinctrl/sun4i-a10.h>
14 compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
28 led-0 {
[all …]
H A Dsun50i-h5-nanopi-r1s-h5.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
10 /dts-v1/;
11 #include "sun50i-h5.dtsi"
12 #include "sun50i-h5-cpu-opp.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/leds/common.h>
20 compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
29 stdout-path = "serial0:115200n8";
[all …]
/freebsd/sys/arm/qualcomm/
H A Dipq4018_usb_hs_phy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
50 {"qcom,usb-hs-ipq4019-phy", 1},
77 * For power-off - assert por, sleep for 10ms, assert srif, in ipq4018_usb_hs_phynode_phy_enable()
78 * sleep for 10ms in ipq4018_usb_hs_phynode_phy_enable()
80 rv = hwreset_assert(sc->por_rst); in ipq4018_usb_hs_phynode_phy_enable()
83 DELAY(10*1000); in ipq4018_usb_hs_phynode_phy_enable()
84 rv = hwreset_assert(sc->srif_rst); in ipq4018_usb_hs_phynode_phy_enable()
87 DELAY(10*1000); in ipq4018_usb_hs_phynode_phy_enable()
90 * For power-on - power off first, then deassert srif, then in ipq4018_usb_hs_phynode_phy_enable()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3568-lubancat-2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,vop2.h>
17 compatible = "embedfire,lubancat-2", "rockchip,rk3568";
27 stdout-path = "serial2:1500000n8";
31 compatible = "gpio-leds";
33 user_led: user-led {
[all …]
/freebsd/sys/dev/gpio/
H A Dgpiopower.c1 /*-
56 if (ofw_bus_is_compatible(dev, "gpio-poweroff")) { in gpiopower_probe()
59 } else if (ofw_bus_is_compatible(dev, "gpio-restart")) { in gpiopower_probe()
76 if ((node = ofw_bus_get_node(dev)) == -1) in gpiopower_attach()
79 if (ofw_gpiobus_parse_gpios(dev, "gpios", &sc->sc_pin) <= 0) { in gpiopower_attach()
84 if (ofw_bus_is_compatible(dev, "gpio-poweroff")) in gpiopower_attach()
85 sc->sc_rbmask = RB_HALT | RB_POWEROFF; in gpiopower_attach()
87 sc->sc_rbmask = 0; in gpiopower_attach()
89 sc->sc_hi_period = 100000; in gpiopower_attach()
90 sc->sc_lo_period = 100000; in gpiopower_attach()
[all …]
/freebsd/share/man/man4/
H A Datkbdc.43 .\" Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
66 .Bl -tag -width MOUSE
74 driver to reset these devices during the boot process.
76 the reset command.
80 wait before eventually giving up -- the driver will wait
94 DELAY1 sets the initial key repeat delay to
96 The default value is 500ms.
97 DELAY2 sets the key repeat delay to
99 The default value is 100ms.

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