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/linux/Documentation/devicetree/bindings/w1/
H A Dw1-uart.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/w1/w1-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UART 1-Wire Bus
10 - Christoph Winklhofer <cj.winklhofer@gmail.com>
13 UART 1-wire bus. Utilizes the UART interface via the Serial Device Bus
14 to create the 1-Wire timing patterns.
16 The UART peripheral must support full-duplex and operate in open-drain
18 baud-rate and transmitted byte, which corresponds to a 1-Wire read bit,
[all …]
/linux/arch/m68k/atari/
H A Ddebug.c6 * Assembled of parts of former atari/config.c 97-12-18 by Roman Hodek
23 /* Can be set somewhere, if a SCC master reset has already be done and should
31 .index = -1,
45 while (count--) { in atari_mfp_console_write()
64 while (count--) { in atari_scc_console_write()
81 while (count--) { in atari_midi_console_write()
91 /* This a some-seconds timeout in case no printer is connected */ in ata_par_out()
94 while ((st_mfp.par_dt_reg & 1) && --i) /* wait for BUSY == L */ in ata_par_out()
117 while (count--) { in atari_par_console_write()
164 * timer values for 1200...115200 bps; > 38400 select 110, 134, or 150 in atari_init_mfp_port()
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dlantiq,pef2256.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
20 - const: lantiq,pef2256
27 - description: Master Clock
28 - description: System Clock Receive
29 - description: System Clock Transmit
31 clock-names:
33 - const: mclk
[all …]
/linux/drivers/soundwire/
H A Dgeneric_bandwidth_allocation.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 // Copyright(c) 2015-2020 Intel Corporation.
40 unsigned int rate, bps, ch = 0; in sdw_compute_slave_ports() local
42 struct sdw_bus_params *b_params = &m_rt->bus->params; in sdw_compute_slave_ports()
44 port_bo = t_data->block_offset; in sdw_compute_slave_ports()
46 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { in sdw_compute_slave_ports()
47 rate = m_rt->stream->params.rate; in sdw_compute_slave_ports()
48 bps = m_rt->stream->params.bps; in sdw_compute_slave_ports()
49 sample_int = (m_rt->bus->params.curr_dr_freq / rate); in sdw_compute_slave_ports()
52 list_for_each_entry(p_rt, &s_rt->port_list, port_node) { in sdw_compute_slave_ports()
[all …]
H A Dstream.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-18 Intel Corporation.
5 * stream.c - SoundWire Bus stream operations.
72 if (bus->params.next_bank) { in _sdw_program_slave_port_params()
73 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num); in _sdw_program_slave_port_params()
74 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num); in _sdw_program_slave_port_params()
75 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num); in _sdw_program_slave_port_params()
76 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num); in _sdw_program_slave_port_params()
78 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num); in _sdw_program_slave_port_params()
79 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num); in _sdw_program_slave_port_params()
[all …]
H A Damd_manager.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
5 * Copyright 2023-24 Advanced Micro Devices, Inc.
35 writel(AMD_SDW_ENABLE, amd_manager->mmio + ACP_SW_EN); in amd_init_sdw_manager()
36 ret = readl_poll_timeout(amd_manager->mmio + ACP_SW_EN_STATUS, val, val, ACP_DELAY_US, in amd_init_sdw_manager()
41 /* SoundWire manager bus reset */ in amd_init_sdw_manager()
42 writel(AMD_SDW_BUS_RESET_REQ, amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); in amd_init_sdw_manager()
43 ret = readl_poll_timeout(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL, val, in amd_init_sdw_manager()
48 writel(AMD_SDW_BUS_RESET_CLEAR_REQ, amd_manager->mmio + ACP_SW_BUS_RESET_CTRL); in amd_init_sdw_manager()
49 ret = readl_poll_timeout(amd_manager->mmio + ACP_SW_BUS_RESET_CTRL, val, !val, in amd_init_sdw_manager()
52 dev_err(amd_manager->dev, "Failed to reset SoundWire manager instance%d\n", in amd_init_sdw_manager()
[all …]
/linux/include/media/i2c/
H A Dtc358743.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tc358743 - Toshiba HDMI to CSI-2 bridge
10 * REF_01 - Toshiba, TC358743XBG (H2C), Functional Specification, Rev 0.60
11 * REF_02 - Toshiba, TC358743XBG_HDMI-CSI_Tv11p_nm.xls
51 /* Bps pr lane is (refclk_hz / pll_prd) * pll_fbd */
61 * bps pr lane is 823.5 MHz, and can serve as a starting point.
73 /* DVI->HDMI detection delay to avoid unnecessary switching between DVI
80 /* Reset PHY automatically when TMDS clock goes from DC to AC.
86 /* Reset PHY automatically when TMDS clock passes 21 MHz.
92 /* Reset PHY automatically when TMDS clock is detected.
[all …]
/linux/drivers/tty/serial/
H A Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
58 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
60 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
61 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
62 #define ERR_RES 0x30 /* Error Reset */
63 #define RES_H_IUS 0x38 /* Reset highest IUS */
65 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
66 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
67 #define RES_EOM_L 0xC0 /* Reset EOM latch */
[all …]
H A Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
50 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
52 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
53 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
54 #define ERR_RES 0x30 /* Error Reset */
55 #define RES_H_IUS 0x38 /* Reset highest IUS */
57 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
58 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
59 #define RES_EOM_L 0xC0 /* Reset EOM latch */
[all …]
H A Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
79 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
81 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
82 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
83 #define ERR_RES 0x30 /* Error Reset */
84 #define RES_H_IUS 0x38 /* Reset highest IUS */
86 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
87 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
[all …]
H A Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
[all …]
H A Dsh-sci.c1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
5 * Copyright (C) 2002 - 2011 Paul Mundt
9 * based off of the old drivers/char/sh-sci.c by:
26 #include <linux/dma-mapping.h>
40 #include <linux/reset.h>
59 #include "sh-sci.h"
60 #include "sh-sci-common.h"
63 ((port)->irqs[SCIx_ERI_IRQ] == \
64 (port)->irqs[SCIx_RXI_IRQ]) || \
[all …]
/linux/Documentation/netlink/specs/
H A Dnet_shaper.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
3 name: net-shaper
26 Existing shapers can be deleted/reset via the @delete operation.
33 @cap-get operation.
36 -
40 render-max: true
42 - name: unspec
44 -
47 -
[all …]
/linux/sound/hda/core/
H A Ddevice.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HD-audio codec core device
28 * snd_hdac_device_init - initialize the HD-audio codec base device
48 dev = &codec->dev; in snd_hdac_device_init()
50 dev->parent = bus->de in snd_hdac_device_init()
917 unsigned int streams, bps; snd_hdac_query_supported_pcm() local
[all...]
/linux/include/uapi/linux/
H A Datmdev.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* atmdev.h - ATM device driver declarations and various related items */
4 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
19 /* OC3 link rate: 155520000 bps
23 #define ATM_25_PCR ((25600000/8-8000)/54)
26 /* OC12 link rate: 622080000 bps
66 /* reset itf's ATM address list */
97 /* enable or disable single-copy */
109 * above. In the future we may support dynamic loading of these - for now,
113 #define ATM_BACKEND_PPP 1 /* PPPoATM - RFC2364 */
[all …]
H A Dscc.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
14 #define PRIMUS 0x04 /* hardware type for PRIMUS-PC (DG9BL) card */
55 PARAM_RETURN = 255 /* reset kiss mode */
102 TXS_NEWFRAME, /* reset CRC and send (next) frame */
135 long speed; /* Line speed, bps */
141 int command; /* one of the KISS-Commands defined above */
142 unsigned param; /* KISS-Param */
150 io_port vector_latch; /* INTACK-Latch (#) */
/linux/include/linux/soundwire/
H A Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
88 * enum sdw_slave_status - Slave status
106 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
107 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
117 * enum sdw_command_response - Comman
744 unsigned int bps; global() member
909 unsigned int bps; global() member
945 unsigned int bps; global() member
[all...]
/linux/drivers/usb/serial/
H A Dcypress_m8.c1 // SPDX-License-Identifier: GPL-2.0+
10 * See Documentation/usb/usb-serial.rst for more information on using this
104 __u8 current_status; /* received from last read - info on dsr,cts,cd,ri,etc */
106 __u8 rx_flags; /* throttling - used from whiteheat/ftdi_sio */
170 .description = "HID->COM RS232 Adapter",
195 .description = "Nokia CA-42 V2 Adapter",
225 /* FRWD Dongle hidcom needs to skip reset and speed checks */
228 return ((le16_to_cpu(dev->descriptor.idVendor) == VENDOR_ID_FRWD) && in is_frwd()
229 (le16_to_cpu(dev->descriptor.idProduct) == PRODUCT_ID_CYPHIDCOM_FRWD)); in is_frwd()
240 /* FRWD Dongle uses 115200 bps */ in analyze_baud_rate()
[all …]
/linux/drivers/net/can/dev/
H A Dnetlink.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix
4 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
51 /* sample point is in one-tenth of a percent */ in can_validate_bittiming()
52 if (bt->sample_point >= 1000) { in can_validate_bittiming()
54 return -EINVAL; in can_validate_bittiming()
70 return -EOPNOTSUPP; in can_validate_tdc()
74 * must be set and vice-versa in can_validate_tdc()
78 return -EOPNOTSUPP; in can_validate_tdc()
82 return -EOPNOTSUPP; in can_validate_tdc()
[all …]
/linux/sound/soc/atmel/
H A Dmchp-spdiftx.c1 // SPDX-License-Identifier: GPL-2.0
22 * ---- S/PDIF Transmitter Controller Register map ----
39 * ---- Control Register (Write-only) ----
41 #define SPDIFTX_CR_SWRST BIT(0) /* Software Reset */
45 * ---- Mode Register (Read/Write) ----
92 * ---- Interrupt Enable/Disable/Mask/Status Register (Write/Read-only) ----
205 regmap_read(dev->regmap, SPDIFTX_MR, &mr); in mchp_spdiftx_is_running()
211 struct mchp_spdiftx_mixer_control *ctrl = &dev->control; in mchp_spdiftx_channel_status_write()
215 for (i = 0; i < ARRAY_SIZE(ctrl->ch_stat) / 4; i++) { in mchp_spdiftx_channel_status_write()
216 val = (ctrl->ch_stat[(i * 4) + 0] << 0) | in mchp_spdiftx_channel_status_write()
[all …]
/linux/drivers/net/wan/
H A Dfarsync.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards
23 * used with the FarSite T-Series cards (T2P & T4P) running in the high
30 * purpose (FarSite T-series).
75 * FSTCPURESET forces the cards CPU into a reset state and holds it there.
76 * FSTCPURELEASE releases the CPU from this reset state allowing it to run,
77 * the reset vector should be setup before this ioctl is run.
105 unsigned int lineSpeed; /* Speed in bps */
121 unsigned char lineBuildOut; /* 0, -7.5, -15, -22 */
179 #define FST_RESET 1 /* Processor held in reset state */
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-synology-ds116.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "armada-385.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
17 stdout-path = "serial0:115200n8";
32 internal-regs {
34 pinctrl-names = "default";
35 pinctrl-0 = <&i2c0_pins>;
37 clock-frequency = <100000>;
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-codec.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _codec-controls:
24 .. _mpeg-control-id:
27 -----------------
35 .. _v4l2-mpeg-stream-type:
40 enum v4l2_mpeg_stream_type -
41 The MPEG-1, -2 or -4 output stream type. One cannot assume anything
48 .. flat-table::
49 :header-rows: 0
50 :stub-columns: 0
[all …]
/linux/Documentation/arch/m68k/
H A Dkernel-options.rst9 Author: Roman.Hodek@informatik.uni-erlangen.de (Roman Hodek)
11 Update: jds@kom.auc.dk (Jes Sorensen) and faq@linux-m68k.org (Chris Lawrence)
58 ----------
76 /dev/ram: -> 0x0100 (initial ramdisk)
77 /dev/hda: -> 0x0300 (first IDE disk)
78 /dev/hdb: -> 0x0340 (second IDE disk)
79 /dev/sda: -> 0x0800 (first SCSI disk)
80 /dev/sdb: -> 0x0810 (second SCSI disk)
81 /dev/sdc: -> 0x0820 (third SCSI disk)
82 /dev/sdd: -> 0x0830 (forth SCSI disk)
[all …]
/linux/sound/soc/codecs/
H A Drt1017-sdca-sdw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt1017-sdca-sdw.c -- rt1017 SDCA ALSA SoC amplifier audio driver
18 #include <sound/soc-dapm.h>
22 #include "rt1017-sdca-sdw.h"
259 struct sdw_slave_prop *prop = &slave->prop; in rt1017_sdca_read_prop()
266 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY; in rt1017_sdca_read_prop()
267 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; in rt1017_sdca_read_prop()
269 prop->paging_support = true; in rt1017_sdca_read_prop()
275 prop->source_ports = BIT(2); /* BITMAP: 00000100 */ in rt1017_sdca_read_prop()
276 prop->sink_ports = BIT(1); /* BITMAP: 00000010 */ in rt1017_sdca_read_prop()
[all …]

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