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/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dnvm-reg.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulator
134 __le32 reserved; global() member
215 __le16 reserved; global() member
263 __le32 reserved; global() member
281 u8 reserved; global() member
321 __le32 channels[]; global() member
348 u8 reserved[3]; global() member
350 __le32 channels[]; global() member
379 u8 reserved[3]; global() member
381 __le32 channels[]; global() member
474 u8 reserved; global() member
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H A Dscan.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 * enum iwl_scan_subcmd_ids - sca
122 u8 reserved[2]; global() member
142 u8 reserved[2]; global() member
201 u8 reserved[3]; global() member
434 __le32 reserved; global() member
593 u8 reserved; global() member
769 u8 reserved; global() member
776 __le16 reserved; global() member
795 __le16 reserved; global() member
810 __le16 reserved; global() member
848 u8 reserved; global() member
941 u8 reserved; global() member
961 __le16 reserved; global() member
986 u8 reserved; global() member
1037 u8 reserved; global() member
1061 __le16 reserved; global() member
1143 __le32 reserved; global() member
1161 __le16 reserved; global() member
1189 __le16 reserved; global() member
1205 __le16 reserved; global() member
1233 __le16 reserved; global() member
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H A Drfi.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2020-2021, 2023 Intel Corporation
13 * struct iwl_rfi_lut_entry - an entry in the RFI frequency LUT.
16 * @channels: channels that can be interfered at frequency freq (at most 15)
21 u8 channels[IWL_RFI_LUT_ENTRY_CHANNELS_NU member
34 u8 reserved[3]; global() member
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dingenic,dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Dti-edma.txt8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
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H A Ddma-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
29 Bitmask of available DMA channels in ascending order that are
30 not reserved by firmware and are available to the
32 The first item in the array is for channels 0-31, the second is for
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H A Dfsl-mxs-dma.txt4 - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
5 - reg : Should contain registers location and length
6 - interrupts : Should contain the interrupt numbers of DMA channels.
7 If a channel is empty/reserved, 0 should be filled in place.
8 - #dma-cells : Must be <1>. The number cell specifies the channel ID.
9 - dma-channels : Number of channels supported by the DMA controller
12 - interrupt-names : Name of DMA channel interrupts
19 dma_apbh: dma-apbh@80004000 {
20 compatible = "fsl,imx28-dma-apbh";
26 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dcc10001_adc.txt1 * Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC)
4 - compatible: Should be "cosmic,10001-adc"
5 - reg: Should contain adc registers location and length.
6 - clock-names: Should contain "adc".
7 - clocks: Should contain a clock specifier for each entry in clock-names
8 - vref-supply: The regulator supply ADC reference voltage.
11 - adc-reserved-channels: Bitmask of reserved channels,
12 i.e. channels that cannot be used by the OS.
16 compatible = "cosmic,10001-adc";
18 adc-reserved-channels = <0x2>;
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H A Dcosmic,10001-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
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H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
11 It has several multiplexed input channels. Conversions can be performed
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
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/freebsd/tools/tools/ath/athrd/
H A Dathrd.11 .\"-
2 .\" Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 .\" All rights reserved.
34 .Nd list channels and transmit power for a country/regulatory domain
53 .Bl -tag -width indent
57 will display B channels only if they are not also marked as available for
58 use as G channels and similary for A and T channels.
61 will list all channels.
63 Calculate channels not assuming extended channel mode.
65 Enabling debugging in the HAL code that calculates the available channels
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/freebsd/sys/dev/ath/ath_hal/
H A Dah_regdomain.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2005-2006 Atheros Communications, Inc.
6 * All rights reserved.
105 a one-on-one mapping exists */
118 * 1/2 and 1/4 rate channels into a separate table).
147 chanbmask_t chan11a; /* 11a channels */
148 chanbmask_t chan11a_turbo; /* 11a static turbo channels */
149 chanbmask_t chan11a_dyn_turbo; /* 11a dynamic turbo channels */
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/freebsd/usr.sbin/bhyve/
H A Daudio.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * All rights reserved.
65 * audio_init - initialize an instance of audio player
66 * @dev_name - the backend sound device used to play / capture
67 * @dir - dir = 1 for write mode, dir = 0 for read mode
92 if (nlen < sizeof(aud->dev_name)) in audio_init()
93 memcpy(aud->dev_name, dev_name, nlen + 1); in audio_init()
100 aud->dir = dir; in audio_init()
102 aud->fd = open(aud->dev_name, aud->dir ? O_WRONLY : O_RDONLY, 0); in audio_init()
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/freebsd/sys/dev/sound/pcm/
H A Dfeeder_format.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2008-2009 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
6 * Copyright (c) 2024-2025 The FreeBSD Foundation
34 * feeder_format: New generation of generic, any-to-any format converter, as
54 uint32_t ialign, oalign, channels; member
64 if (f->desc->in == f->desc->out || in feed_format_init()
65 AFMT_CHANNEL(f->desc->in) != AFMT_CHANNEL(f->desc->out)) in feed_format_init()
72 info->channels = AFMT_CHANNEL(f->desc->in); in feed_format_init()
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H A Dfeeder_volume.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2005-2009 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
54 uint32_t channels, uint8_t *dst, uint32_t count) \
60 dst += count * PCM_##BIT##_BPS * channels; \
62 i = channels; \
64 dst -= PCM_##BIT##_BPS; \
65 i--; \
74 } while (--count != 0); \
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H A Dfeeder_matrix.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2008-2009 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
6 * Copyright (c) 2024-2025 The FreeBSD Foundation
34 * feeder_matrix: Generic any-to-any channel matrixing. Probably not the
37 * possible non-standard way of multichannel interleaving
126 for (i = 0; info->matrix[i].chn[0] != SND_CHN_T_EOF; i++) { in feed_matrix_apply()
127 if (info->matrix[i].chn[0] == SND_CHN_T_NULL) { in feed_matrix_apply()
129 dst += info->bps; in feed_matrix_apply()
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H A Dmatrix.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2009 Ariff Abdullah <ariff@FreeBSD.org>
5 * All rights reserved.
58 #define SND_CHN_T_MAX 18 /* Maximum channels */
167 #define SND_CHN_MATRIX_DRV -4 /* driver own identity */
168 #define SND_CHN_MATRIX_PCMCHANNEL -3 /* PCM channel identity */
169 #define SND_CHN_MATRIX_MISC -2 /* misc, custom defined */
170 #define SND_CHN_MATRIX_UNKNOWN -1 /* unknown */
227 * .channels = Total number of channels, including whatever 'extended'
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/freebsd/share/man/man4/
H A Dpcm.42 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
3 .\" All rights reserved.
39 .Bd -ragged -offset indent
60 driver are: multichannel audio, per-application
61 volume control, dynamic mixing through virtual sound channels, true full
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -width ".Va snd_driver_load" -offset indent
164 To define default values for the different mixer channels,
174 multichannel matrix processor supports up to 18 interleaved channels, but the
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H A Dsnd_hdspe.42 .\" All rights reserved.
34 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
56 .Bl -bullet -compact
58 RME HDSPe AIO (optional AO4S-192 and AI4S-192 extension boards)
67 The effective number of ADAT channels is 8 channels at single speed
68 (32kHz-48kHz), 4 channels at double speed (64kHz-96kHz), and 2 channels at
69 quad speed (128kHz-192kHz).
70 Depending on sample rate and channel format selected, not all pcm channels can
71 be mapped to ADAT channels and vice versa.
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H A Dsnd_hdsp.43 .\" All rights reserved.
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
68 The effective number of ADAT channels is 8 channels at single speed
69 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
72 Depending on sample rate and channel format selected, not all pcm channels can
73 be mapped to ADAT channels and vice versa.
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/freebsd/usr.sbin/bluetooth/l2control/
H A Dl2cap.c1 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
6 * Copyright (c) 2001-2002 Maksim Yevmenkin <m_evmenkin@yahoo.com>
7 * All rights reserved.
61 strlcpy(str, he->h_name, sizeof(str)); in bdaddrpr()
162 "%-17.17s " \ in l2cap_read_connection_list()
203 r.channels = calloc(NG_L2CAP_MAX_CHAN_NUM, in l2cap_read_channel_list()
205 if (r.channels == NULL) { in l2cap_read_channel_list()
215 fprintf(stdout, "L2CAP channels:\n"); in l2cap_read_channel_list()
220 "%-17.17s " \ in l2cap_read_channel_list()
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/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dfsl-sec2.txt1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
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/freebsd/sys/contrib/xen/io/
H A Dsndif.h4 * Unified sound-device I/O interface for Xen guest OSes.
24 * Copyright (C) 2013-2015 GlobalLogic Inc.
25 * Copyright (C) 2016-2017 EPAM Systems Inc.
51 * Front->back notifications: when enqueuing a new request, sending a
53 * hold-off mechanism provided by the ring macros). Backends must set
56 * Back->front notifications: when enqueuing a new response, sending a
58 * hold-off mechanism provided by the ring macros). Frontends must set
61 * The two halves of a para-virtual sound card driver utilize nodes within
75 * Note: depending on the use-case backend can expose more sound cards and
77 * SW mixers, configuring virtual sound streams, channels etc.
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/freebsd/contrib/wpa/src/common/
H A Dieee802_11_common.c3 * Copyright (c) 2002-2019, Jouni Malinen <j@w1.fi>
15 #include "qca-vendor.h"
28 * sub-type. */ in ieee802_11_parse_vendor_specific()
35 return -1; in ieee802_11_parse_vendor_specific()
41 /* Microsoft/Wi-Fi information elements are further typed and in ieee802_11_parse_vendor_specific()
47 elems->wpa_ie = pos; in ieee802_11_parse_vendor_specific()
48 elems->wpa_ie_len = elen; in ieee802_11_parse_vendor_specific()
57 return -1; in ieee802_11_parse_vendor_specific()
68 elems->wmm = pos; in ieee802_11_parse_vendor_specific()
69 elems->wmm_len = elen; in ieee802_11_parse_vendor_specific()
[all …]
/freebsd/share/man/man4/man4.arm/
H A Dbcm283x_pwm.42 .\" SPDX-License-Identifier: BSD-2-Clause
4 .\" Copyright (c) 2017 Poul-Henning Kamp <phk@FreeBSD.org>
5 .\" All rights reserved.
32 .Nd bcm283x_pwm - driver for Raspberry Pi 2/3 PWM
44 .Bd -literal
55 .Bl -tag -width ".Va dev.pwm"
57 PWM Mode for channels 1 and 2.
59 The N/M mode is a first order delta-sigma mode, which makes a quite
64 Applies to both channels 1 and 2.
80 The "on" period in cycles for PWM channels 1 and 2.
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