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/linux/Documentation/driver-api/fpga/
H A Dintro.rst4 The FPGA subsystem supports reprogramming FPGAs dynamically under
54 reprogramming FPGAs when device tree overlays are applied.
/linux/kernel/time/
H A Dhrtimer.c259 * so we keep it on the same CPU. No hassle vs. reprogramming in switch_hrtimer_base()
554 * cpu_base::*expires_next right away, reprogramming logic would no longer
781 * function call will take care of the reprogramming in case the in retrigger_next_event()
894 * before reprogramming. Nothing to do here. in update_needs_ipi()
1099 * reprogram to zero. This is useful, when the context does a reprogramming
1142 * Remove the timer and force reprogramming when high in remove_hrtimer()
1144 * CPU. If we remove a timer on another CPU, reprogramming is in remove_hrtimer()
1146 * reprogramming happens in the interrupt handler. This is a in remove_hrtimer()
1153 * If the timer is not restarted then reprogramming is in remove_hrtimer()
1196 * reprogramming needs to be triggered, even if the next soft in hrtimer_update_softirq_timer()
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H A DKconfig42 # Automatically adjust the min. reprogramming time for
H A Dtick-broadcast.c717 * it can avoid reprogramming the cpu local in tick_handle_oneshot_broadcast()
899 * reprogramming makes sure that the event in ___tick_broadcast_oneshot_control()
908 * avoid reprogramming and enforce that the in ___tick_broadcast_oneshot_control()
/linux/arch/arm/kernel/
H A Dvmlinux-xip.lds.S186 * situation when we are reprogramming MPU region we run on with
187 * something which doesn't cover reprogramming code itself, so as soon
/linux/drivers/firmware/microchip/
H A DKconfig9 Support for reprogramming PolarFire SoC from within Linux, using the
H A Dmpfs-auto-update.c3 * Microchip Polarfire SoC "Auto Update" FPGA reprogramming.
467 MODULE_DESCRIPTION("PolarFire SoC Auto Update FPGA reprogramming");
/linux/Documentation/devicetree/bindings/soc/microchip/
H A Dmicrochip,mpfs-sys-controller.yaml15 services include hardware rng, reprogramming of the FPGA and verification of the
/linux/arch/loongarch/kernel/
H A Dgenex.S30 * reprogramming. Fall through -- see handle_vint() below -- and have
/linux/drivers/mtd/maps/
H A Dsc520cdp.c36 ** choose more useful addresses for the FLASH banks by reprogramming the
178 if(!mmcr) { /* ioremap failed: skip the PAR reprogramming */ in sc520cdp_setup_par()
/linux/drivers/input/tablet/
H A Daiptek.c1053 * both displays current setting and allows reprogramming.
1089 * both displays current setting and allows reprogramming.
1125 * both displays current setting and allows reprogramming.
1166 * both displays current setting and allows reprogramming.
1207 * both displays current setting and allows reprogramming.
1248 * both displays current setting and allows reprogramming.
1277 * both displays current setting and allows reprogramming.
1567 * of writing to this file triggers a tablet reprogramming. in store_tabletExecute()
/linux/drivers/media/i2c/
H A Dmax9271.h229 * communicate with local devices that do not support address reprogramming.
/linux/arch/x86/kvm/
H A Dpmu.c596 * The reprogramming bitmap can be written asynchronously by something in kvm_pmu_handle_event()
605 * If reprogramming fails, e.g. due to contention, re-set the in kvm_pmu_handle_event()
608 * stall the guest if reprogramming repeatedly fails. in kvm_pmu_handle_event()
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmaxim,max9286.yaml193 address reprogramming. The number of entries depends on the
/linux/drivers/pwm/
H A Dpwm-xilinx.c12 * reprogramming, but I think it would add complexity for little gain.
/linux/drivers/gpu/drm/pl111/
H A Dpl111_drv.c32 * - Read back hardware state at boot to skip reprogramming the
/linux/Documentation/timers/
H A Dno_hz.rst92 number of expensive clock-reprogramming operations.
/linux/arch/arm/mach-omap2/
H A Dio.c392 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate); in _omap2_init_reprogram_sdrc()
/linux/arch/arm/mm/
H A Dioremap.c416 * code in external memory. This is needed for reprogramming source
/linux/Documentation/devicetree/bindings/fpga/
H A Dfpga-region.yaml147 FPGA. After reprogramming is successful, the overlay is accepted into the live
/linux/drivers/cpufreq/
H A Dimx6q-cpufreq.c111 * reprogram PLL for frequency scaling. The procedure of reprogramming in imx6q_set_target()
/linux/drivers/ata/
H A Dpata_ftide010.c233 * and MWDMA_TIMING_REG is shared between master and slave, so reprogramming
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v4.c59 * reprogramming the PCI endpoint after MAPTI does not result in a
/linux/drivers/clk/qcom/
H A Dclk-cpu-8996.c36 * when we are reprogramming the PLL itself (for rate changes) when
/linux/Documentation/driver-api/
H A Dxillybus.rst240 quite likely as a result of an accidental reprogramming of the FPGA while the

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