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/linux/Documentation/driver-api/fpga/
H A Dintro.rst4 The FPGA subsystem supports reprogramming FPGAs dynamically under
54 reprogramming FPGAs when device tree overlays are applied.
/linux/kernel/time/
H A Dhrtimer.c286 * the same CPU. No hassle vs. reprogramming the event source in switch_hrtimer_base()
607 * cpu_base::*expires_next right away, reprogramming logic would no longer
826 * function call will take care of the reprogramming in case the in retrigger_next_event()
896 /* If a deferred rearm is pending skip reprogramming the device */ in hrtimer_reprogram()
1163 * reprogram to zero. This is useful, when the context does a reprogramming
1220 * Remove the timer and force reprogramming when high in remove_hrtimer()
1222 * CPU. If we remove a timer on another CPU, reprogramming is in remove_hrtimer()
1224 * reprogramming happens in the interrupt handler. This is a in remove_hrtimer()
1332 * Reprogramming needs to be triggered, even if the next soft in hrtimer_update_softirq_timer()
1352 * CPU to optimize reprogramming of the clockevent device. Also in hrtimer_prefer_local()
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H A Dtick-broadcast.c730 * it can avoid reprogramming the cpu local in tick_handle_oneshot_broadcast()
912 * reprogramming makes sure that the event in ___tick_broadcast_oneshot_control()
921 * avoid reprogramming and enforce that the in ___tick_broadcast_oneshot_control()
H A Dclockevents.c211 "CE: Reprogramming failure. Giving up\n"); in clockevents_increase_min_delta()
356 /* ktime_t based reprogramming for the broadcast hrtimer device */ in clockevents_program_event()
/linux/arch/arm/kernel/
H A Dvmlinux-xip.lds.S187 * situation when we are reprogramming MPU region we run on with
188 * something which doesn't cover reprogramming code itself, so as soon
/linux/drivers/firmware/microchip/
H A DKconfig9 Support for reprogramming PolarFire SoC from within Linux, using the
H A Dmpfs-auto-update.c3 * Microchip Polarfire SoC "Auto Update" FPGA reprogramming.
469 MODULE_DESCRIPTION("PolarFire SoC Auto Update FPGA reprogramming");
/linux/arch/loongarch/kernel/
H A Dgenex.S30 * reprogramming. Fall through -- see handle_vint() below -- and have
/linux/drivers/input/tablet/
H A Daiptek.c1026 * both displays current setting and allows reprogramming.
1062 * both displays current setting and allows reprogramming.
1098 * both displays current setting and allows reprogramming.
1139 * both displays current setting and allows reprogramming.
1180 * both displays current setting and allows reprogramming.
1221 * both displays current setting and allows reprogramming.
1250 * both displays current setting and allows reprogramming.
1540 * of writing to this file triggers a tablet reprogramming. in store_tabletExecute()
/linux/drivers/parisc/
H A Dgsc.c157 /* ASP chip (svers 0x70) does not support reprogramming */ in gsc_set_affinity_irq()
/linux/drivers/media/i2c/
H A Dmax9271.h229 * communicate with local devices that do not support address reprogramming.
/linux/drivers/fpga/
H A Dfpga-region.c91 * reprogramming the region until the caller considers it safe to do so.
/linux/drivers/gpu/drm/
H A Ddrm_plane_helper.c230 * drm_mode_set_config_internal. We're reprogramming the same in drm_plane_helper_update_primary()
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dmaxim,max9286.yaml193 address reprogramming. The number of entries depends on the
/linux/arch/x86/events/amd/
H A Dbrs.c140 * reprogramming of the period. in amd_brs_hw_config()
/linux/Documentation/timers/
H A Dno_hz.rst92 number of expensive clock-reprogramming operations.
/linux/arch/arm/mach-omap2/
H A Dio.c392 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate); in _omap2_init_reprogram_sdrc()
/linux/arch/arm/mm/
H A Dioremap.c416 * code in external memory. This is needed for reprogramming source
/linux/Documentation/devicetree/bindings/fpga/
H A Dfpga-region.yaml143 FPGA. After reprogramming is successful, the overlay is accepted into the live
/linux/drivers/rtc/
H A Drtc-rzn1.c295 /* Disable alarm interrupts before reprogramming the alarm. */ in rzn1_rtc_set_alarm()
/linux/drivers/clk/qcom/
H A Dclk-cpu-8996.c36 * when we are reprogramming the PLL itself (for rate changes) when
/linux/arch/arm64/kvm/vgic/
H A Dvgic-v4.c59 * reprogramming the PCI endpoint after MAPTI does not result in a
/linux/Documentation/driver-api/
H A Dxillybus.rst240 quite likely as a result of an accidental reprogramming of the FPGA while the
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv50.c452 * sclk to hclk) before reprogramming in nv50_clk_calc()
/linux/tools/testing/selftests/vfio/lib/drivers/igb/
H A Digb.c493 * via vfio_pci_irq_reenable() before reprogramming so any caller-cached

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