Searched +full:renesas +full:- +full:rzt2h +full:- +full:n2h +full:- +full:pins +full:- +full:node (Results 1 – 1 of 1) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pinctrl/renesas,r9a09g077-pinctrl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas RZ/T2H and RZ/N2H Pin and GPIO controller10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>13 The Renesas RZ/T2H and RZ/N2H SoCs feature a combined Pin and GPIO controller.14 Pin multiplexing and GPIO configuration are performed on a per-pin basis.15 Each port supports up to 8 pins, each configurable for either GPIO (port mode)22 - renesas,r9a09g077-pinctrl # RZ/T2H[all …]