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/linux/drivers/gpu/drm/xe/
H A Dxe_tuning.c1 // SPDX-License-Identifier: MIT
40 { XE_RTP_NAME("Tuning: L3 cache - media"),
51 { XE_RTP_NAME("Tuning: Compression Overfetch - media"),
60 { XE_RTP_NAME("Tuning: Enable compressible partial write overfetch in L3 - media"),
70 { XE_RTP_NAME("Tuning: L2 Overfetch Compressible Only - media"),
81 { XE_RTP_NAME("Tuning: Stateless compression control - media"),
90 { XE_RTP_NAME("Tuning: L3 RW flush all cache - media"),
113 ENGINE_CLASS(RENDER)),
131 XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3599), ENGINE_CLASS(RENDER)),
138 XE_RTP_RULES(PLATFORM(DG2), ENGINE_CLASS(RENDER)),
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H A Dxe_gt_freq.c1 // SPDX-License-Identifier: MIT
35 * **Read-only** attributes:
37 * - ``act_freq``: The actual resolved frequency decided by PCODE.
38 * - ``cur_freq``: The current one requested by GuC PC to the PCODE.
39 * - ``rpn_freq``: The Render Performance (RP) N level, which is the minimal one.
40 * - ``rpa_freq``: The Render Performance (RP) A level, which is the achievable one.
42 * - ``rpe_freq``: The Render Performance (RP) E level, which is the efficient one.
44 * - ``rp0_freq``: The Render Performance (RP) 0 level, which is the maximum one.
46 * **Read-write** attributes:
48 * - ``min_freq``: Min frequency request.
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H A Dxe_configfs.c1 // SPDX-License-Identifier: MIT
31 * Configfs is a filesystem-based manager of kernel objects. Xe KMD registers a
77 * -------------------
87 * -----------------
93 * Writes support both comma- and newline-separated input format. Reads
125 * ----------------
131 * Allow only one render and one copy engines, nothing else::
139 * Note that the engine names are the per-GT hardware names. On multi-tile
140 * platforms, writing ``rcs0,bcs0`` to this file would allow the first render
151 * ----
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/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_client.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
27 * Minimum PB = Base Pages + (NUM_TE_PIPES-1)*16K + (NUM_VCE_PIPES-1)*64K +
39 * Since the max of NUM_TE_PIPES and NUM_VCE_PIPES is 4, we have a hard limit
40 * of 4GB minus the Minimum PB. For convenience we take the smaller power-of-2
60 /* Indicates whether this render produces visibility results. */
66 /* Disable pixel merging for this render. */
70 /* Disallow compute overlapped with this render. */
153 * Holds the geometry/fragment fence value to allow the fragment partial render command
252 /* Stride IN BYTES for Z-Buffer in case of RTAs. */
254 /* Stride IN BYTES for S-Buffer in case of RTAs. */
H A Dpvr_rogue_fwif_sf.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
47 * - --- ---- ---- ---- ---- ---- ---- ----
48 * 0-11: id number
49 * 12-15: group id number
50 * 16-19: number of parameters
51 * 20-27: unused
52 * 28-30: active: identify SF packet, otherwise regular int32
80 "Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" },
96 "Restart TA after partial render" },
98 "Resume TA without partial render" },
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/linux/Documentation/driver-api/mtd/
H A Dspi-intel.rst2 Upgrading BIOS using spi-intel
14 The spi-intel driver makes it possible to read and write the SPI serial
16 any of them set, the whole MTD device is made read-only to prevent
18 contents as read-only but it can be changed from kernel command line,
22 might render the machine unbootable and requires special equipment like
25 Below are the steps how to upgrade MinnowBoard MAX BIOS directly from
28 1) Download and extract the latest Minnowboard MAX BIOS SPI image
31 2) Install mtd-utils package [2]. We need this in order to erase the SPI
33 name "mtd-utils".
67 Erasing 4 Kibyte @ 7ff000 -- 100 % complete
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/linux/drivers/gpu/drm/
H A Ddrm_ioctl.c56 * - GET_UNIQUE ioctl, implemented by drm_getunique is wrapped up in libdrm
58 * - The libdrm drmSetBusid function is backed by the SET_UNIQUE ioctl. All
60 * - The internal set_busid kernel functions and driver callbacks are
63 * - Other ioctls and functions involved are named consistently.
76 * side-effect this fills out the unique name in the master structure.
121 mutex_lock(&dev->master_mutex); in drm_getunique()
122 master = file_priv->master; in drm_getunique()
123 if (u->unique_len >= master->unique_len) { in drm_getunique()
124 if (copy_to_user(u->unique, master->unique, master->unique_len)) { in drm_getunique()
125 mutex_unlock(&dev->master_mutex); in drm_getunique()
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/linux/scripts/
H A Dasn1_compiler.c1 // SPDX-License-Identifier: GPL-2.0-or-later
229 [DIRECTIVE_ENCODING_CONTROL] = "ENCODING-CONTROL",
253 _(MAX),
255 [DIRECTIVE_MINUS_INFINITY] = "MINUS-INFINITY",
265 [DIRECTIVE_PLUS_INFINITY] = "PLUS-INFINITY",
270 [DIRECTIVE_RELATIVE_OID] = "RELATIVE-OID",
325 clen = (dlen < token->size) ? dlen : token->size; in directive_compare()
327 //debug("cmp(%s,%s) = ", token->content, dir); in directive_compare()
329 val = memcmp(token->content, dir, clen); in directive_compare()
335 if (dlen == token->size) { in directive_compare()
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/linux/Documentation/netlink/specs/
H A Dnet_shaper.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
3 name: net-shaper
33 @cap-get operation.
36 -
40 render-max: true
42 - name: unspec
44 -
47 -
52 -
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/linux/drivers/base/regmap/
H A Dregcache-maple.c1 // SPDX-License-Identifier: GPL-2.0
3 // Register cache access API - maple tree based cache
19 struct maple_tree *mt = map->cache; in regcache_maple_read()
28 return -ENOENT; in regcache_maple_read()
31 *value = entry[reg - mas.index]; in regcache_maple_read()
41 struct maple_tree *mt = map->cache; in regcache_maple_write()
52 entry[reg - mas.index] = val; in regcache_maple_write()
58 mas_set_range(&mas, reg - 1, reg + 1); in regcache_maple_write()
62 lower = mas_find(&mas, reg - 1); in regcache_maple_write()
65 lower_sz = (mas.last - mas.index + 1) * sizeof(unsigned long); in regcache_maple_write()
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/linux/sound/pci/lx6464es/
H A Dlx_defs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* -*- linux-c -*- *
16 * [ 44k - ( 44.1k + 48k ) / 2 ]
75 #define MAX_STREAM_BUFFER 5 /* max amount of stream buffers. */
80 /* #define MASK_GRANULARITY (2*MICROBLAZE_IBL_MAX-1) */
130 PSTATE_PURGE = 2, /* the ES channels are now off, render pipes do
132 PSTATE_ACQUIRE = 3, /* the ES channels are now on, render pipes do
170 SF_XRUN = 0x20000000, /* the stream is un x-run state. */
281 #define ED_REGISTRY_ERROR (ED_GN | 0x28) /* <- NCX */
282 #define ED_INVALID_SERVICE (ED_GN | 0x29) /* <- NCX */
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/linux/drivers/gpu/drm/amd/display/modules/freesync/
H A Dfreesync.c2 * Copyright 2016-2023 Advanced Micro Devices, Inc.
36 /* Number of elements in the render times cache array */
38 /* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */
72 core_freesync->dc = dc; in mod_freesync_create()
73 return &core_freesync->public; in mod_freesync_create()
120 * 10000) * stream->timing.h_total, in calc_duration_in_us_from_v_total()
121 stream->timing.pix_clk_100hz)); in calc_duration_in_us_from_v_total()
128 unsigned int max_hw_v_total = stream->ctx->dc->caps.max_v_total; in calc_max_hardware_v_total()
130 if (stream->ctx->dc->caps.vtotal_limited_by_fp2) { in calc_max_hardware_v_total()
131 max_hw_v_total -= stream->timing.v_front_porch + 1; in calc_max_hardware_v_total()
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/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_context.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2011-2012 Intel Corporation
12 * supports contexts for the render ring.
18 * would happen if a client ran and piggy-backed off another clients GPU state.
26 * store GPU state, and thus allow GPU clients to not re-emit state (and
30 * The context life cycle is semi-complicated in that context BOs may live
43 * S0->S1: client creates a context
44 * S1->S2: client submits execbuf with context
45 * S2->S3: other clients submits execbuf with context
46 * S3->S1: context object was retired
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/linux/drivers/gpu/drm/msm/
H A Dmsm_debugfs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2016 Red Hat
10 #include <linux/fault-inject.h>
35 struct msm_gpu_show_priv *show_priv = m->private; in msm_gpu_show()
36 struct msm_drm_private *priv = show_priv->dev->dev_private; in msm_gpu_show()
37 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show()
40 ret = mutex_lock_interruptible(&gpu->lock); in msm_gpu_show()
44 drm_printf(&p, "%s Status:\n", gpu->name); in msm_gpu_show()
45 gpu->funcs->show(gpu, show_priv->state, &p); in msm_gpu_show()
47 mutex_unlock(&gpu->lock); in msm_gpu_show()
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/linux/tools/net/ynl/pyynl/lib/
H A Ddoc_generator.py2 # SPDX-License-Identifier: GPL-2.0
3 # -*- coding: utf-8; mode: python -*-
40 def headroom(level: int) -> str:
45 def bold(text: str) -> str:
50 def inline(text: str) -> str:
55 def sanitize(text: str) -> str:
60 def rst_fields(self, key: str, value: str, level: int = 0) -> str:
64 def rst_definition(self, key: str, value: Any, level: int = 0) -> str:
68 def rst_paragraph(self, paragraph: str, level: int = 0) -> str:
72 def rst_bullet(self, item: str, level: int = 0) -> str:
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/linux/Documentation/gpu/rfc/
H A Dcolor_pipeline.rst1 .. SPDX-License-Identifier: GPL-2.0
10 We would like to support pre-, and post-blending complex color
12 HW-supported HDR use-cases, as well as to provide support to
13 color-managed applications, such as video or image editors.
17 compositor or application to render and compose the content into one
22 implemented in fixed-function HW and therefore much more power efficient than
27 fixed-function blocks and shaders/CPU must be seamless with no visible
34 The most widely supported use-cases regard HDR content, whether video or
38 function, and other metadata, such as max and average light levels) to a driver.
39 Drivers will then program their fixed-function HW accordingly to map from a
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/linux/tools/power/x86/turbostat/
H A Dturbostat.83 turbostat \- Report processor frequency and idle statistics
12 .RB [ "\--interval seconds" ]
15 idle power-state statistics, temperature and power on X86 processors.
19 in one-shot upon its completion.
22 The 5-second interval can be changed using the --interval option.
26 Options can be specified with a single or double '-', and only as much of the option
27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv
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/linux/include/uapi/drm/
H A Dradeon_drm.h1 /* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
66 #define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */
72 /* New style per-packet identifiers for use in cmd_buffer ioctl with
183 #define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note:
234 /* these two defines are DOING IT WRONG - however
332 * a 1K-byte boundary.
336 #define RADEON_OFFSET_MASK (RADEON_OFFSET_ALIGN - 1)
450 /* Counters for client-side throttling of rendering clients.
640 /* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices
641 * - allows multiple primitives and state changes in a single ioctl
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H A Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
46 * track of these events, and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
158 * enum drm_i915_gem_engine_class - uapi engine type enumeration
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/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_ctrl.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
17 /* 64-bit per app capabilities */
23 * THB-350, 32k needs to be reserved.
61 /* Hash type pre-pended when a RSS hash was computed */
80 /* Read/Write config words (0x0000 - 0x002c)
87 * %NFP_NET_CFG_EXN: MSI-X table entry for exceptions
88 * %NFP_NET_CFG_LSC: MSI-X table entry for link state changes
92 * - define Error details in UPDATE
108 #define NFP_NET_CFG_CTRL_RXQINQ (0x1 << 13) /* Enable S-tag strip */
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/linux/drivers/gpu/drm/msm/registers/adreno/
H A Dadreno_pm4.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <value name="VS_DEALLOC" value="0x00" variants="A2XX-A5XX"/>
10 <value name="PS_DEALLOC" value="0x01" variants="A2XX-A5XX"/>
11 <value name="VS_DONE_TS" value="0x02" variants="A2XX-A5XX"/>
12 <value name="PS_DONE_TS" value="0x03" variants="A2XX-A5XX"/>
19 <value name="CACHE_FLUSH" value="0x06" variants="A2XX-A4XX"/>
21 <value name="HLSQ_FLUSH" value="0x07" variants="A3XX-A4XX"/>
24 <value name="WRITE_PRIMITIVE_COUNTS" value="0x09" variants="A6XX-"/>
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/linux/tools/include/uapi/drm/
H A Di915_drm.h
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd.c1 // SPDX-License-Identifier: MIT
33 #include <linux/dma-buf.h>
53 amdgpu_amdkfd_total_mem_size = si.freeram - si.freehigh; in amdgpu_amdkfd_init()
77 adev->kfd.dev = kgd2kfd_probe(adev, vf); in amdgpu_amdkfd_device_probe()
81 * amdgpu_doorbell_get_kfd_info - Report doorbell configuration required to
102 if (adev->enable_mes) { in amdgpu_doorbell_get_kfd_info()
109 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
112 } else if (adev->doorbell.size > adev->doorbell.num_kernel_doorbells * in amdgpu_doorbell_get_kfd_info()
114 *aperture_base = adev->doorbell.base; in amdgpu_doorbell_get_kfd_info()
115 *aperture_size = adev->doorbell.size; in amdgpu_doorbell_get_kfd_info()
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/linux/drivers/video/fbdev/
H A Dsmscufx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * smscufx.c -- Framebuffer driver for SMSC UFX USB controller
13 * Works well with Bernie Thompson's X DAMAGE patch to xf86-video-fbdev
17 * usb-skeleton by GregKH.
52 * DisplayLink X server as yet - need both to be modified in tandem
58 /* -BULK_SIZE as per usb-skeleton. Can we get full page and avoid overhead? */
60 #define MAX_TRANSFER (PAGE_SIZE*16 - BULK_SIZE)
94 struct device *gdev; /* &udev->dev */
101 atomic_t lost_pixels; /* 1 = a render op failed. Need screen refresh */
150 return -ENOMEM; in ufx_reg_read()
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/linux/tools/net/ynl/pyynl/
H A Dynl_gen_c.py2 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
4 # pylint: disable=line-too-long, missing-clas
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