Home
last modified time | relevance | path

Searched +full:render +full:- +full:max (Results 1 – 25 of 54) sorted by relevance

123

/linux/Documentation/netlink/specs/
H A Ddpll.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
8 -
16 -
20 -
23 render-max: true
24 -
26 name: lock-status
31 -
37 -
41 -
[all …]
H A Dnetdev.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
9 -
11 name: xdp-act
12 render-max: true
14 -
19 -
23 -
24 name: ndo-xmit
27 -
28 name: xsk-zerocopy
[all …]
H A Dethtool.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 protocol: genetlink-legacy
8 uapi-header: linux/ethtool_netlink_generated.h
11 -
12 name: udp-tunnel-type
13 enum-name:
15 entries: [ vxlan, geneve, vxlan-gpe ]
16 enum-cnt-name: __ethtool-udp-tunnel-type-cnt
17 render-max: true
18 -
[all …]
/linux/Documentation/netlink/
H A Dgenetlink-c.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
3 ---
4 $id: http://kernel.org/schemas/netlink/genetlink-c.yaml#
5 $schema: https://json-schema.org/draft-07/schema
12 len-or-define:
14 pattern: ^[0-9A-Za-z_-]+( - 1)?$
16 len-or-limit:
17 # literal int, const name, or limit based on fixed-width type
18 # e.g. u8-min, u16-max, etc.
20 pattern: ^[0-9A-Za-z_-]+$
[all …]
H A Dgenetlink-legacy.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
3 ---
4 $id: http://kernel.org/schemas/netlink/genetlink-legacy.yaml#
5 $schema: https://json-schema.org/draft-07/schema
12 len-or-define:
14 pattern: ^[0-9A-Za-z_-]+( - 1)?$
16 len-or-limit:
17 # literal int, const name, or limit based on fixed-width type
18 # e.g. u8-min, u16-max, etc.
20 pattern: ^[0-9A-Za-z_-]+$
[all …]
H A Dgenetlink.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
3 ---
4 $id: http://kernel.org/schemas/netlink/genetlink-legacy.yaml#
5 $schema: https://json-schema.org/draft-07/schema
12 len-or-define:
14 pattern: ^[0-9A-Za-z_-]+( - 1)?$
16 len-or-limit:
17 # literal int, const name, or limit based on fixed-width type
18 # e.g. u8-min, u16-max, etc.
20 pattern: ^[0-9A-Za-z_-]+$
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_gt_freq.c1 // SPDX-License-Identifier: MIT
34 * device/tile#/gt#/freq0/<item>_freq *read-only* files:
35 * - act_freq: The actual resolved frequency decided by PCODE.
36 * - cur_freq: The current one requested by GuC PC to the PCODE.
37 * - rpn_freq: The Render Performance (RP) N level, which is the minimal one.
38 * - rpe_freq: The Render Performance (RP) E level, which is the efficient one.
39 * - rp0_freq: The Render Performance (RP) 0 level, which is the maximum one.
41 * device/tile#/gt#/freq0/<item>_freq *read-write* files:
42 * - min_freq: Min frequency request.
43 * - max_freq: Max frequency request.
[all …]
H A Dxe_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2024 Intel Corporation
45 * Book-keeping structure used to track read and write pointers
46 * as we extract error capture data from the GuC-log-buffer's
47 * error-capture region as a stream of dwords.
57 * struct __guc_capture_parsed_output - extracted error capture node
59 * A single unit of extracted error-capture output data grouped together
60 * at an engine-instance level. We keep these nodes in a linked list.
65 * A single set of 3 capture lists: a global-list
66 * an engine-class-list and an engine-instance list.
[all …]
/linux/drivers/gpu/drm/v3d/
H A Dv3d_perfmon.c1 // SPDX-License-Identifier: GPL-2.0
13 …{"FEP", "FEP-valid-primitives-no-rendered-pixels", "[FEP] Valid primitives that result in no rende…
14 …{"FEP", "FEP-valid-primitives-rendered-pixels", "[FEP] Valid primitives for all rendered tiles (pr…
15 {"FEP", "FEP-clipped-quads", "[FEP] Early-Z/Near/Far clipped quads"},
16 {"FEP", "FEP-valid-quads", "[FEP] Valid quads"},
17 …{"TLB", "TLB-quads-not-passing-stencil-test", "[TLB] Quads with no pixels passing the stencil test…
18 …{"TLB", "TLB-quads-not-passing-z-and-stencil-test", "[TLB] Quads with no pixels passing the Z and …
19 …{"TLB", "TLB-quads-passing-z-and-stencil-test", "[TLB] Quads with any pixels passing the Z and ste…
20 {"TLB", "TLB-quads-with-zero-coverage", "[TLB] Quads with all pixels having zero coverage"},
21 …{"TLB", "TLB-quads-with-non-zero-coverage", "[TLB] Quads with any pixels having non-zero coverage"…
[all …]
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_client.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
27 * Minimum PB = Base Pages + (NUM_TE_PIPES-1)*16K + (NUM_VCE_PIPES-1)*64K +
39 * Since the max of NUM_TE_PIPES and NUM_VCE_PIPES is 4, we have a hard limit
40 * of 4GB minus the Minimum PB. For convenience we take the smaller power-of-2
60 /* Indicates whether this render produces visibility results. */
66 /* Disable pixel merging for this render. */
70 /* Disallow compute overlapped with this render. */
153 * Holds the geometry/fragment fence value to allow the fragment partial render command
252 /* Stride IN BYTES for Z-Buffer in case of RTAs. */
254 /* Stride IN BYTES for S-Buffer in case of RTAs. */
H A Dpvr_rogue_fwif_sf.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
47 * - --- ---- ---- ---- ---- ---- ---- ----
48 * 0-11: id number
49 * 12-15: group id number
50 * 16-19: number of parameters
51 * 20-27: unused
52 * 28-30: active: identify SF packet, otherwise regular int32
80 "Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" },
96 "Restart TA after partial render" },
98 "Resume TA without partial render" },
[all …]
H A Dpvr_rogue_fwif.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
42 /* String used in pvrdebug -h output */
140 /* Firmware per-DM HWR states */
147 /* DM need partial render cleanup before resuming processing */
155 /* DM was identified as over-running and causing HWR */
157 /* DM was innocently affected by another DM over-running which caused HWR */
270 /* Identify whether MC config is P-P or P-S */
274 /* per-os firmware shared data */
297 /* Firmware trace time-stamp field breakup */
303 /* Extra debug-info (16 bits) */
[all …]
/linux/Documentation/driver-api/mtd/
H A Dspi-intel.rst2 Upgrading BIOS using spi-intel
14 The spi-intel driver makes it possible to read and write the SPI serial
16 any of them set, the whole MTD device is made read-only to prevent
18 contents as read-only but it can be changed from kernel command line,
22 might render the machine unbootable and requires special equipment like
25 Below are the steps how to upgrade MinnowBoard MAX BIOS directly from
28 1) Download and extract the latest Minnowboard MAX BIOS SPI image
31 2) Install mtd-utils package [2]. We need this in order to erase the SPI
33 name "mtd-utils".
67 Erasing 4 Kibyte @ 7ff000 -- 100 % complete
[all …]
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_rps.c1 // SPDX-License-Identifier: MIT
43 return rps_to_gt(rps)->i915; in rps_to_i915()
48 return rps_to_gt(rps)->uncore; in rps_to_uncore()
55 return &gt_to_guc(gt)->slpc; in rps_to_slpc()
62 return intel_uc_uses_guc_slpc(&gt->uc); in rps_uses_slpc()
67 return mask & ~rps->pm_intrmsk_mbz; in rps_pm_sanitize_mask()
90 last = engine->stats.rps; in rps_timer()
91 engine->stats.rps = dt; in rps_timer()
99 last = rps->pm_timestamp; in rps_timer()
100 rps->pm_timestamp = timestamp; in rps_timer()
[all …]
/linux/scripts/
H A Dasn1_compiler.c1 // SPDX-License-Identifier: GPL-2.0-or-later
229 [DIRECTIVE_ENCODING_CONTROL] = "ENCODING-CONTROL",
253 _(MAX),
255 [DIRECTIVE_MINUS_INFINITY] = "MINUS-INFINITY",
265 [DIRECTIVE_PLUS_INFINITY] = "PLUS-INFINITY",
270 [DIRECTIVE_RELATIVE_OID] = "RELATIVE-OID",
325 clen = (dlen < token->size) ? dlen : token->size; in directive_compare()
327 //debug("cmp(%s,%s) = ", token->content, dir); in directive_compare()
329 val = memcmp(token->content, dir, clen); in directive_compare()
335 if (dlen == token->size) { in directive_compare()
[all …]
/linux/sound/pci/lx6464es/
H A Dlx_defs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* -*- linux-c -*- *
16 * [ 44k - ( 44.1k + 48k ) / 2 ]
75 #define MAX_STREAM_BUFFER 5 /* max amount of stream buffers. */
80 /* #define MASK_GRANULARITY (2*MICROBLAZE_IBL_MAX-1) */
130 PSTATE_PURGE = 2, /* the ES channels are now off, render pipes do
132 PSTATE_ACQUIRE = 3, /* the ES channels are now on, render pipes do
170 SF_XRUN = 0x20000000, /* the stream is un x-run state. */
281 #define ED_REGISTRY_ERROR (ED_GN | 0x28) /* <- NCX */
282 #define ED_INVALID_SERVICE (ED_GN | 0x29) /* <- NCX */
[all …]
/linux/include/uapi/drm/
H A Damdgpu_drm.h1 /* amdgpu_drm.h -- Public header for the amdgpu driver -*- linux-c -*-
82 * GPU's virtual address space via gart. Gart memory linearizes non-contiguous
89 * %AMDGPU_GEM_DOMAIN_GDS Global on-chip data storage used to share data
166 /* Flag that BO should be coherent across devices when using device-level
174 /* Set PTE.D and recompress during GTT->VRAM moves according to TILING flags. */
267 #define AMDGPU_CTX_PRIORITY_UNSET -2048
268 #define AMDGPU_CTX_PRIORITY_VERY_LOW -1023
269 #define AMDGPU_CTX_PRIORITY_LOW -512
378 /* SI-CI-VI: */
397 /* GFX9 - GFX11: */
[all …]
H A Dradeon_drm.h1 /* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*-
66 #define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */
72 /* New style per-packet identifiers for use in cmd_buffer ioctl with
183 #define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note:
234 /* these two defines are DOING IT WRONG - however
332 * a 1K-byte boundary.
336 #define RADEON_OFFSET_MASK (RADEON_OFFSET_ALIGN - 1)
450 /* Counters for client-side throttling of rendering clients.
640 /* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices
641 * - allows multiple primitives and state changes in a single ioctl
[all …]
H A Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
46 * track of these events, and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
158 * enum drm_i915_gem_engine_class - uapi engine type enumeration
[all …]
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Dadreno_pm4.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
10 <value name="PS_DEALLOC" value="1" variants="A2XX-A6XX"/>
19 <value name="CACHE_FLUSH" value="6" variants="A2XX-A4XX"/>
21 <value name="HLSQ_FLUSH" value="7" variants="A3XX-A4XX"/>
27 <!-- Not sure that these 4 events don't have the same meaning as on A5XX+ -->
28 <value name="RST_PIX_CNT" value="13" variants="A2XX-A4XX"/>
29 <value name="RST_VTX_CNT" value="14" variants="A2XX-A4XX"/>
30 <value name="TILE_FLUSH" value="15" variants="A2XX-A4XX"/>
[all …]
/linux/tools/power/x86/turbostat/
H A Dturbostat.83 turbostat \- Report processor frequency and idle statistics
12 .RB [ "\--interval seconds" ]
15 idle power-state statistics, temperature and power on X86 processors.
19 in one-shot upon its completion.
22 The 5-second interval can be changed using the --interval option.
26 Options can be specified with a single or double '-', and only as much of the option
27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv…
29 \fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attri…
39 … event for given device from /sys/bus/event_source/devices/<device>/events/<event> eg. c1-residency
40 …perf/cstate_core/c1-residency would then use /sys/bus/event_source/devices/cstate_core/events/c1-r…
[all …]
/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_ctrl.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
17 /* 64-bit per app capabilities */
23 * THB-350, 32k needs to be reserved.
61 /* Hash type pre-pended when a RSS hash was computed */
80 /* Read/Write config words (0x0000 - 0x002c)
87 * %NFP_NET_CFG_EXN: MSI-X table entry for exceptions
88 * %NFP_NET_CFG_LSC: MSI-X table entry for link state changes
92 * - define Error details in UPDATE
108 #define NFP_NET_CFG_CTRL_RXQINQ (0x1 << 13) /* Enable S-tag strip */
[all …]
/linux/tools/include/uapi/drm/
H A Di915_drm.h19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
37 * subject to backwards-compatibility constraints.
43 * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
46 * track of these events, and if a specific cache-line seems to have a
48 * intel-gpu-tools. The value supplied with the event is always 1.
50 * I915_ERROR_UEVENT - Generated upon error detection, currently only via
57 * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
66 * struct i915_user_extension - Base class for defining a chain of extensions
82 * .. code-block:: C
158 * enum drm_i915_gem_engine_class - uapi engine type enumeration
[all …]
/linux/tools/net/ynl/pyynl/
H A Dynl_gen_c.py2 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
20 return name.upper().replace('-', '_')
24 return name.lower().replace('-', '_')
29 Turn a string limit like u32-max or s64-min into its numerical value
31 if name[0] == 'u' and name.endswith('-min'):
33 width = int(name[1:-4])
35 width -= 1
36 value = (1 << width) - 1
37 if name[0] == 's' and name.endswith('-min'):
38 value = -value - 1
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dskl_universal_plane.c1 // SPDX-License-Identifier: MIT
275 const struct drm_framebuffer *fb = plane_state->hw.fb; in glk_plane_ratio()
277 if (fb->format->cpp[0] == 8) { in glk_plane_ratio()
302 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_plane_ratio()
304 if (fb->format->cpp[0] == 8) { in skl_plane_ratio()
328 int cpp = fb->format->cpp[color_plane]; in skl_plane_max_width()
330 switch (fb->modifier) { in skl_plane_max_width()
336 * - Ytile (already limited to 4k) in skl_plane_max_width()
337 * - FP16 (already limited to 4k) in skl_plane_max_width()
338 * - render compression (already limited to 4k) in skl_plane_max_width()
[all …]

123