Searched +full:regulator +full:- +full:step +full:- +full:size +full:- +full:25 +full:mv (Results 1 – 5 of 5) sorted by relevance
4 - compatible : Should be "ti,tps65086".5 - reg : I2C slave address.6 - interrupts : The interrupt line the device is connected to.7 - interrupt-controller : Marks the device node as an interrupt controller.8 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.11 masks from ../interrupt-controller/interrupts.txt.12 - gpio-controller : Marks the device node as a GPIO Controller.13 - #gpio-cells : Should be two. The first cell is the pin number and16 - regulators: : List of child nodes that specify the regulator18 after their hardware counterparts: buck[1-6],[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Emil Renner Berthing <kernel@esmil.dk>23 interrupt-controller: true25 '#interrupt-cells':29 encoded as trigger masks from ../interrupt-controller/interrupts.txt.31 gpio-controller: true33 '#gpio-cells':43 List of child nodes that specify the regulator initialization data.[all …]
1 /*-2 * SPDX-License-Identifier: BSD-2-Clause4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.32 /* Power-on reset state */54 /* The 'doorbell' addresses are hard-wired to alert the MC when written */57 /* The rest of these are firmware-defined */65 /* Values to be written to the per-port status dword in shared94 * | | \--- Response95 * | \------- Error96 * \------------------------------ Resync (always set)[all …]
2 * Copyright (c) 2017-2018 Cavium, Inc. 78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…116 … (0x1<<9) // Fast back-to-back transaction ena…128 … (0x1<<23) // Fast back-to-back capable. Not ap…132 … (0x3<<25) // DEVSEL timing. N…[all …]
5 # Date: 2024-09-20 03:15:028 # the PCI ID Project at https://pci-ids.ucw.cz/.14 # (version 2 or higher) or the 3-clause BSD License.25 # device device_name <-- single tab26 # subvendor subdevice subsystem_name <-- two tabs30 # This is a relabelled RTL-813931 8139 AT-2500TX V3 Ethernet41 7a09 PCI-to-PCI Bridge49 7a19 PCI-to-PCI Bridge53 7a29 PCI-to-PCI Bridge[all …]