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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad4130.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 - adi,ad4130
29 clock-names:
31 - const: mclk
36 interrupt-names:
42 - int
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H A Dadi,ad4170-4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/adi,ad4170-4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD4170-4 and similar Analog to Digital Converters
10 - Marcelo Schmitt <marcelo.schmitt@analog.com>
13 Analog Devices AD4170-4 series of Sigma-delta Analog to Digital Converters.
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4170-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4190-4.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4195-4.pdf
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/linux/drivers/iio/adc/
H A Dad7192.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2011-2015 Analog Devices Inc.
12 #include <linux/clk-provider.h>
36 #define AD7192_REG_COMM 0 /* Communications Register (WO, 8-bit) */
37 #define AD7192_REG_STAT 0 /* Status Register (RO, 8-bit) */
38 #define AD7192_REG_MODE 1 /* Mode Register (RW, 24-bit */
39 #define AD7192_REG_CONF 2 /* Configuration Register (RW, 24-bit) */
40 #define AD7192_REG_DATA 3 /* Data Register (RO, 24/32-bit) */
41 #define AD7192_REG_ID 4 /* ID Register (RO, 8-bit) */
42 #define AD7192_REG_GPOCON 5 /* GPOCON Register (RO, 8-bit) */
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H A Dad4170-4.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Analog Devices AD4170-4 ADC driver
6 * Author: Ana-Maria Cusco <ana-maria.cusco@analog.com>
17 #include <linux/clk-provider.h>
81 /* AD4170_CONFIG_A_REG - INTERFACE_CONFIG_A REGISTER */
246 [AD4170_CHAN_SETUP_REG(0) ... AD4170_CHAN_MAP_REG(AD4170_MAX_ADC_CHANNELS - 1)] = 2,
249 * also interleaved but MISC, AFE, FILTER, FILTER_FS, OFFSET are 16-bit
250 * while OFFSET, GAIN are 24-bit registers so we can't init them all to
278 AD4170_REF_BUF_PRE, /* Pre-charge referrence buffer */
283 /* maps adi,positive/negative-reference-buffer property values to enum */
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