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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7192.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
21 - adi,ad7190
22 - adi,ad7192
23 - adi,ad7193
24 - adi,ad7194
25 - adi,ad7195
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H A Dadi,ad4130.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 - adi,ad4130
29 clock-names:
31 - const: mclk
36 interrupt-names:
42 - int
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/linux/drivers/iio/adc/
H A Dad7192.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2011-2015 Analog Devices Inc.
11 #include <linux/clk-provider.h>
35 #define AD7192_REG_COMM 0 /* Communications Register (WO, 8-bit) */
36 #define AD7192_REG_STAT 0 /* Status Register (RO, 8-bit) */
37 #define AD7192_REG_MODE 1 /* Mode Register (RW, 24-bit */
38 #define AD7192_REG_CONF 2 /* Configuration Register (RW, 24-bit) */
39 #define AD7192_REG_DATA 3 /* Data Register (RO, 24/32-bit) */
40 #define AD7192_REG_ID 4 /* ID Register (RO, 8-bit) */
41 #define AD7192_REG_GPOCON 5 /* GPOCON Register (RO, 8-bit) */
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H A Dad4130.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/clk-provider.h>
125 #define AD4130_INVALID_SLOT -1
137 [AD4130_CHANNEL_X_REG(0) ... AD4130_CHANNEL_X_REG(AD4130_MAX_CHANNELS - 1)] = 3,
138 [AD4130_CONFIG_X_REG(0) ... AD4130_CONFIG_X_REG(AD4130_MAX_SETUPS - 1)] = 2,
139 [AD4130_FILTER_X_REG(0) ... AD4130_FILTER_X_REG(AD4130_MAX_SETUPS - 1)] = 3,
140 [AD4130_OFFSET_X_REG(0) ... AD4130_OFFSET_X_REG(AD4130_MAX_SETUPS - 1)] = 3,
141 [AD4130_GAIN_X_REG(0) ... AD4130_GAIN_X_REG(AD4130_MAX_SETUPS - 1)] = 3,
393 return -EINVAL; in ad4130_get_reg_size()
427 st->reg_write_tx_buf[0] = reg; in ad4130_reg_write()
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